[PATCH v2 2/2] riscv: dts: spacemit: Add cpu scaling for K1 SoC

Aurelien Jarno aurelien at aurel32.net
Tue Apr 21 10:11:11 PDT 2026


Hi,

On 2026-04-21 16:10, Shuwei Wu wrote:
> Hi Aurelien,
> 
> Thanks for your addition.
> 
> On Tue Apr 21, 2026 at 5:16 AM CST, Aurelien Jarno wrote:
> > Hi Anand,
> >
> > On 2026-04-16 17:07, Anand Moon wrote:
> >> After reviewing the Banana Pi F3 schematics, I confirmed that Buck1 and Buck2
> >> Both supply the CORE_0V9 with 0.9V±1% rail. To resolve the restriction errors,
> >> I expanded the voltage range in the DTS to 500,000–950,000 µV.
> >> 
> >> Additionally, I updated the DTS to map the second CPU cluster (cores 4–7)
> >> to Buck2 to better align with the hardware's power distribution.
> >
> > Actually the output of Buck1 and Buck2 are connected together, so they 
> > should always be configured with the same output voltage. And both 
> > clusters should be mapped to both outputs.
> 
> You are right, I received the same response from the official developers.
> 
> Therefore, I'm wondering if an additional regulator-coupled-with: property
> definition is also needed here?

Yes, I think this is the way to go. I even wonder if this shouldn't be a 
fix with Cc: stable. This also has to be done for the Milk-V Jupiter 
board, I haven't checked the other boards yet, but I guess they all use 
the same schematics at that the PMIC level.

Regards
Aurelien

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien at aurel32.net                     http://aurel32.net



More information about the linux-riscv mailing list