[GIT PULL] KVM/riscv changes for 7.1
Anup Patel
anup at brainfault.org
Sun Apr 12 06:14:24 PDT 2026
Hi Paolo,
We have the following KVM RISC-V changes for 7.1:
1) Fixes for issues in steal time accounting, vector and
PMU which were discovered by KVM API fuzzing
2) Split huge pages during fault handling for dirty logging
so that write permission is restored for smaller pages
3) Improve kvm_arch_vcpu_load() performance by skipping
CSR restore if VCPU is reloaded on the same core
4) Implement kvm_arch_has_default_irqchip() for KVM selftests
5) Support configuration of per-VM HGATP mode from KVM
user space
6) Some more preparatory changes for nested virtualization
such as:
6.1) Factored-out ISA checks into separate sources
6.2) Added hideleg to struct kvm_vcpu_config
6.3) Factored-out VCPU config into separate sources
Please pull.
Regards,
Anup
The following changes since commit c369299895a591d96745d6492d4888259b004a9e:
Linux 7.0-rc5 (2026-03-22 14:42:17 -0700)
are available in the Git repository at:
https://github.com/kvm-riscv/linux.git tags/kvm-riscv-7.1-1
for you to fetch changes up to ddbf9c76c4020bf63a0799b00faad40caa3de6c2:
RISC-V: KVM: Fix shift-out-of-bounds in make_xfence_request()
(2026-04-06 09:43:02 +0530)
----------------------------------------------------------------
KVM/riscv changes for 7.1
- Fix steal time shared memory alignment checks
- Fix vector context allocation leak
- Fix array out-of-bounds in pmu_ctr_read() and pmu_fw_ctr_read_hi()
- Fix double-free of sdata in kvm_pmu_clear_snapshot_area()
- Fix integer overflow in kvm_pmu_validate_counter_mask()
- Fix shift-out-of-bounds in make_xfence_request()
- Fix lost write protection on huge pages during dirty logging
- Split huge pages during fault handling for dirty logging
- Skip CSR restore if VCPU is reloaded on the same core
- Implement kvm_arch_has_default_irqchip() for KVM selftests
- Factored-out ISA checks into separate sources
- Added hideleg to struct kvm_vcpu_config
- Factored-out VCPU config into separate sources
- Support configuration of per-VM HGATP mode from KVM user space
----------------------------------------------------------------
Anup Patel (6):
RISC-V: KVM: Introduce common kvm_riscv_isa_check_host()
RISC-V: KVM: Factor-out ISA checks into separate sources
RISC-V: KVM: Move timer state defines closer to struct in UAPI header
RISC-V: KVM: Add hideleg to struct kvm_vcpu_config
RISC-V: KVM: Factor-out VCPU config into separate sources
RISC-V: KVM: Don't check hstateen0 when updating sstateen0 CSR
Fangyu Yu (3):
RISC-V: KVM: Support runtime configuration for per-VM's HGATP mode
RISC-V: KVM: Cache gstage pgd_levels in struct kvm_gstage
RISC-V: KVM: Reuse KVM_CAP_VM_GPA_BITS to select HGATP.MODE
Jiakai Xu (8):
RISC-V: KVM: Validate SBI STA shmem alignment in kvm_sbi_ext_sta_set_reg()
KVM: selftests: Refactor UAPI tests into dedicated function
RISC-V: KVM: selftests: Add RISC-V SBI STA shmem alignment tests
RISC-V: KVM: Fix array out-of-bounds in pmu_ctr_read() and
pmu_fw_ctr_read_hi()
RISC-V: KVM: selftests: Fix firmware counter read in sbi_pmu_test
RISC-V: KVM: Fix double-free of sdata in kvm_pmu_clear_snapshot_area()
RISC-V: KVM: Fix integer overflow in kvm_pmu_validate_counter_mask()
RISC-V: KVM: Fix shift-out-of-bounds in make_xfence_request()
Jinyu Tang (1):
KVM: riscv: Skip CSR restore if VCPU is reloaded on the same core
Mayuresh Chitale (1):
KVM: riscv: selftests: Implement kvm_arch_has_default_irqchip
Osama Abdelkader (2):
RISC-V: KVM: fix PMU snapshot_set_shmem on 32-bit hosts
riscv: kvm: fix vector context allocation leak
Wang Yechao (2):
RISC-V: KVM: Fix lost write protection on huge pages during dirty logging
RISC-V: KVM: Split huge pages during fault handling for dirty logging
Yufeng Wang (1):
riscv: kvm: add null pointer check for vector datap
arch/riscv/include/asm/kvm_gstage.h | 51 +++-
arch/riscv/include/asm/kvm_host.h | 23 +-
arch/riscv/include/asm/kvm_isa.h | 20 ++
arch/riscv/include/asm/kvm_vcpu_config.h | 25 ++
arch/riscv/include/uapi/asm/kvm.h | 8 +-
arch/riscv/kvm/Makefile | 2 +
arch/riscv/kvm/aia_device.c | 4 +-
arch/riscv/kvm/gstage.c | 198 +++++++++++---
arch/riscv/kvm/isa.c | 253 ++++++++++++++++++
arch/riscv/kvm/main.c | 16 +-
arch/riscv/kvm/mmu.c | 70 ++---
arch/riscv/kvm/tlb.c | 3 +-
arch/riscv/kvm/vcpu.c | 111 +++-----
arch/riscv/kvm/vcpu_config.c | 103 ++++++++
arch/riscv/kvm/vcpu_fp.c | 9 +-
arch/riscv/kvm/vcpu_onereg.c | 284 ++-------------------
arch/riscv/kvm/vcpu_pmu.c | 33 ++-
arch/riscv/kvm/vcpu_sbi_sta.c | 16 +-
arch/riscv/kvm/vcpu_timer.c | 3 +-
arch/riscv/kvm/vcpu_vector.c | 11 +-
arch/riscv/kvm/vm.c | 49 +++-
arch/riscv/kvm/vmid.c | 3 +-
.../testing/selftests/kvm/include/kvm_util_types.h | 2 +
tools/testing/selftests/kvm/include/riscv/sbi.h | 37 +++
tools/testing/selftests/kvm/lib/riscv/processor.c | 5 +
tools/testing/selftests/kvm/riscv/sbi_pmu_test.c | 20 +-
tools/testing/selftests/kvm/steal_time.c | 98 +++++--
27 files changed, 956 insertions(+), 501 deletions(-)
create mode 100644 arch/riscv/include/asm/kvm_isa.h
create mode 100644 arch/riscv/include/asm/kvm_vcpu_config.h
create mode 100644 arch/riscv/kvm/isa.c
create mode 100644 arch/riscv/kvm/vcpu_config.c
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