[PATCH 1/2] iommu/riscv: Advertise Svpbmt support to generic page table

[Anup Patel]

On Sat, Apr 11, 2026 at 7:52 AM <fangyu.yu at linux.alibaba.com> wrote:
>
> From: Fangyu Yu <fangyu.yu at linux.alibaba.com>
>
> The RISC-V IOMMU can optionally support Svpbmt page-based memory types
> in its page table format. When present,the generic page table code can
> use this capability to encode memory attributes (e.g. MMIO vs normal
> memory) in PTEs.
>
> Signed-off-by: Fangyu Yu <fangyu.yu at linux.alibaba.com>

Looks good from RISC-V perspective.

Reviewed-by: Anup Patel <anup at brainfault.org>

Regards,
Anup


> ---
>  drivers/iommu/riscv/iommu.c       | 2 ++
>  include/linux/generic_pt/common.h | 1 +
>  2 files changed, 3 insertions(+)
>
> diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
> index c7d0342aa747..e53883935563 100644
> --- a/drivers/iommu/riscv/iommu.c
> +++ b/drivers/iommu/riscv/iommu.c
> @@ -1194,6 +1194,8 @@ static struct iommu_domain *riscv_iommu_alloc_paging_domain(struct device *dev)
>         cfg.common.features = BIT(PT_FEAT_SIGN_EXTEND) |
>                               BIT(PT_FEAT_FLUSH_RANGE) |
>                               BIT(PT_FEAT_RISCV_SVNAPOT_64K);
> +       if (iommu->caps & RISCV_IOMMU_CAPABILITIES_SVPBMT)
> +               cfg.common.features |= BIT(PT_FEAT_RISCV_SVPBMT);
>         domain->riscvpt.iommu.nid = dev_to_node(iommu->dev);
>         domain->domain.ops = &riscv_iommu_paging_domain_ops;
>
> diff --git a/include/linux/generic_pt/common.h b/include/linux/generic_pt/common.h
> index fc5d0b5edadc..dfadf8a5752a 100644
> --- a/include/linux/generic_pt/common.h
> +++ b/include/linux/generic_pt/common.h
> @@ -188,6 +188,7 @@ enum {
>          * Support the 64k contiguous page size following the Svnapot extension.
>          */
>         PT_FEAT_RISCV_SVNAPOT_64K = PT_FEAT_FMT_START,
> +       PT_FEAT_RISCV_SVPBMT,
>
>  };
>
> --
> 2.50.1
>
>