[PATCH 2/2] riscv: dts: sophgo: sg2042: use hex for CPU unit address
Guo Ren
guoren at kernel.org
Mon Apr 6 18:26:59 PDT 2026
On Tue, Apr 7, 2026 at 7:27 AM Inochi Amaoto <inochiama at gmail.com> wrote:
>
> Previous the CPU unit address cpu of sg2042 use decimal, it is
> not following the general convention for unit addresses of the
> OF. Convent the unit address to hex to resolve this problem.
>
> The introduces a small ABI break for the CPU id, but it should
> affect nothing since there is no direct full-path reference to
> these CPU nodes.
>
> Fixes: ae5bac370ed4 ("riscv: dts: sophgo: Add initial device tree of Sophgo SRD3-10")
> Signed-off-by: Inochi Amaoto <inochiama at gmail.com>
> Link: https://lore.kernel.org/devicetree-spec/00ddad5a-02f5-474e-af9c-11ce7716ddfc@iscas.ac.cn/
I don't think this tag is necessary. For others:
Reviewed-by: Guo Ren <guoren at kernel.org>
> ---
> arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi | 236 ++++++++++----------
> 1 file changed, 118 insertions(+), 118 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi b/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi
> index 509488eee432..fd8906b313d2 100644
> --- a/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi
> @@ -263,7 +263,7 @@ cpu0: cpu at 0 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <0>;
> + reg = <0x0>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -291,7 +291,7 @@ cpu1: cpu at 1 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <1>;
> + reg = <0x1>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -319,7 +319,7 @@ cpu2: cpu at 2 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <2>;
> + reg = <0x2>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -347,7 +347,7 @@ cpu3: cpu at 3 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <3>;
> + reg = <0x3>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -375,7 +375,7 @@ cpu4: cpu at 4 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <4>;
> + reg = <0x4>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -403,7 +403,7 @@ cpu5: cpu at 5 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <5>;
> + reg = <0x5>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -431,7 +431,7 @@ cpu6: cpu at 6 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <6>;
> + reg = <0x6>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -459,7 +459,7 @@ cpu7: cpu at 7 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <7>;
> + reg = <0x7>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -487,7 +487,7 @@ cpu8: cpu at 8 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <8>;
> + reg = <0x8>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -515,7 +515,7 @@ cpu9: cpu at 9 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <9>;
> + reg = <0x9>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -533,7 +533,7 @@ cpu9_intc: interrupt-controller {
> };
> };
>
> - cpu10: cpu at 10 {
> + cpu10: cpu at a {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -543,7 +543,7 @@ cpu10: cpu at 10 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <10>;
> + reg = <0xa>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -561,7 +561,7 @@ cpu10_intc: interrupt-controller {
> };
> };
>
> - cpu11: cpu at 11 {
> + cpu11: cpu at b {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -571,7 +571,7 @@ cpu11: cpu at 11 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <11>;
> + reg = <0xb>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -589,7 +589,7 @@ cpu11_intc: interrupt-controller {
> };
> };
>
> - cpu12: cpu at 12 {
> + cpu12: cpu at c {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -599,7 +599,7 @@ cpu12: cpu at 12 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <12>;
> + reg = <0xc>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -617,7 +617,7 @@ cpu12_intc: interrupt-controller {
> };
> };
>
> - cpu13: cpu at 13 {
> + cpu13: cpu at d {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -627,7 +627,7 @@ cpu13: cpu at 13 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <13>;
> + reg = <0xd>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -645,7 +645,7 @@ cpu13_intc: interrupt-controller {
> };
> };
>
> - cpu14: cpu at 14 {
> + cpu14: cpu at e {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -655,7 +655,7 @@ cpu14: cpu at 14 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <14>;
> + reg = <0xe>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -673,7 +673,7 @@ cpu14_intc: interrupt-controller {
> };
> };
>
> - cpu15: cpu at 15 {
> + cpu15: cpu at f {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -683,7 +683,7 @@ cpu15: cpu at 15 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <15>;
> + reg = <0xf>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -701,7 +701,7 @@ cpu15_intc: interrupt-controller {
> };
> };
>
> - cpu16: cpu at 16 {
> + cpu16: cpu at 10 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -711,7 +711,7 @@ cpu16: cpu at 16 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <16>;
> + reg = <0x10>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -729,7 +729,7 @@ cpu16_intc: interrupt-controller {
> };
> };
>
> - cpu17: cpu at 17 {
> + cpu17: cpu at 11 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -739,7 +739,7 @@ cpu17: cpu at 17 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <17>;
> + reg = <0x11>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -757,7 +757,7 @@ cpu17_intc: interrupt-controller {
> };
> };
>
> - cpu18: cpu at 18 {
> + cpu18: cpu at 12 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -767,7 +767,7 @@ cpu18: cpu at 18 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <18>;
> + reg = <0x12>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -785,7 +785,7 @@ cpu18_intc: interrupt-controller {
> };
> };
>
> - cpu19: cpu at 19 {
> + cpu19: cpu at 13 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -795,7 +795,7 @@ cpu19: cpu at 19 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <19>;
> + reg = <0x13>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -813,7 +813,7 @@ cpu19_intc: interrupt-controller {
> };
> };
>
> - cpu20: cpu at 20 {
> + cpu20: cpu at 14 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -823,7 +823,7 @@ cpu20: cpu at 20 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <20>;
> + reg = <0x14>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -841,7 +841,7 @@ cpu20_intc: interrupt-controller {
> };
> };
>
> - cpu21: cpu at 21 {
> + cpu21: cpu at 15 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -851,7 +851,7 @@ cpu21: cpu at 21 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <21>;
> + reg = <0x15>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -869,7 +869,7 @@ cpu21_intc: interrupt-controller {
> };
> };
>
> - cpu22: cpu at 22 {
> + cpu22: cpu at 16 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -879,7 +879,7 @@ cpu22: cpu at 22 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <22>;
> + reg = <0x16>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -897,7 +897,7 @@ cpu22_intc: interrupt-controller {
> };
> };
>
> - cpu23: cpu at 23 {
> + cpu23: cpu at 17 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -907,7 +907,7 @@ cpu23: cpu at 23 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <23>;
> + reg = <0x17>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -925,7 +925,7 @@ cpu23_intc: interrupt-controller {
> };
> };
>
> - cpu24: cpu at 24 {
> + cpu24: cpu at 18 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -935,7 +935,7 @@ cpu24: cpu at 24 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <24>;
> + reg = <0x18>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -953,7 +953,7 @@ cpu24_intc: interrupt-controller {
> };
> };
>
> - cpu25: cpu at 25 {
> + cpu25: cpu at 19 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -963,7 +963,7 @@ cpu25: cpu at 25 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <25>;
> + reg = <0x19>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -981,7 +981,7 @@ cpu25_intc: interrupt-controller {
> };
> };
>
> - cpu26: cpu at 26 {
> + cpu26: cpu at 1a {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -991,7 +991,7 @@ cpu26: cpu at 26 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <26>;
> + reg = <0x1a>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1009,7 +1009,7 @@ cpu26_intc: interrupt-controller {
> };
> };
>
> - cpu27: cpu at 27 {
> + cpu27: cpu at 1b {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1019,7 +1019,7 @@ cpu27: cpu at 27 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <27>;
> + reg = <0x1b>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1037,7 +1037,7 @@ cpu27_intc: interrupt-controller {
> };
> };
>
> - cpu28: cpu at 28 {
> + cpu28: cpu at 1c {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1047,7 +1047,7 @@ cpu28: cpu at 28 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <28>;
> + reg = <0x1c>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1065,7 +1065,7 @@ cpu28_intc: interrupt-controller {
> };
> };
>
> - cpu29: cpu at 29 {
> + cpu29: cpu at 1d {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1075,7 +1075,7 @@ cpu29: cpu at 29 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <29>;
> + reg = <0x1d>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1093,7 +1093,7 @@ cpu29_intc: interrupt-controller {
> };
> };
>
> - cpu30: cpu at 30 {
> + cpu30: cpu at 1e {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1103,7 +1103,7 @@ cpu30: cpu at 30 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <30>;
> + reg = <0x1e>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1121,7 +1121,7 @@ cpu30_intc: interrupt-controller {
> };
> };
>
> - cpu31: cpu at 31 {
> + cpu31: cpu at 1f {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1131,7 +1131,7 @@ cpu31: cpu at 31 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <31>;
> + reg = <0x1f>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1149,7 +1149,7 @@ cpu31_intc: interrupt-controller {
> };
> };
>
> - cpu32: cpu at 32 {
> + cpu32: cpu at 20 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1159,7 +1159,7 @@ cpu32: cpu at 32 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <32>;
> + reg = <0x20>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1177,7 +1177,7 @@ cpu32_intc: interrupt-controller {
> };
> };
>
> - cpu33: cpu at 33 {
> + cpu33: cpu at 21 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1187,7 +1187,7 @@ cpu33: cpu at 33 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <33>;
> + reg = <0x21>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1205,7 +1205,7 @@ cpu33_intc: interrupt-controller {
> };
> };
>
> - cpu34: cpu at 34 {
> + cpu34: cpu at 22 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1215,7 +1215,7 @@ cpu34: cpu at 34 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <34>;
> + reg = <0x22>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1233,7 +1233,7 @@ cpu34_intc: interrupt-controller {
> };
> };
>
> - cpu35: cpu at 35 {
> + cpu35: cpu at 23 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1243,7 +1243,7 @@ cpu35: cpu at 35 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <35>;
> + reg = <0x23>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1261,7 +1261,7 @@ cpu35_intc: interrupt-controller {
> };
> };
>
> - cpu36: cpu at 36 {
> + cpu36: cpu at 24 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1271,7 +1271,7 @@ cpu36: cpu at 36 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <36>;
> + reg = <0x24>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1289,7 +1289,7 @@ cpu36_intc: interrupt-controller {
> };
> };
>
> - cpu37: cpu at 37 {
> + cpu37: cpu at 25 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1299,7 +1299,7 @@ cpu37: cpu at 37 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <37>;
> + reg = <0x25>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1317,7 +1317,7 @@ cpu37_intc: interrupt-controller {
> };
> };
>
> - cpu38: cpu at 38 {
> + cpu38: cpu at 26 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1327,7 +1327,7 @@ cpu38: cpu at 38 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <38>;
> + reg = <0x26>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1345,7 +1345,7 @@ cpu38_intc: interrupt-controller {
> };
> };
>
> - cpu39: cpu at 39 {
> + cpu39: cpu at 27 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1355,7 +1355,7 @@ cpu39: cpu at 39 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <39>;
> + reg = <0x27>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1373,7 +1373,7 @@ cpu39_intc: interrupt-controller {
> };
> };
>
> - cpu40: cpu at 40 {
> + cpu40: cpu at 28 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1383,7 +1383,7 @@ cpu40: cpu at 40 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <40>;
> + reg = <0x28>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1401,7 +1401,7 @@ cpu40_intc: interrupt-controller {
> };
> };
>
> - cpu41: cpu at 41 {
> + cpu41: cpu at 29 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1411,7 +1411,7 @@ cpu41: cpu at 41 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <41>;
> + reg = <0x29>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1429,7 +1429,7 @@ cpu41_intc: interrupt-controller {
> };
> };
>
> - cpu42: cpu at 42 {
> + cpu42: cpu at 2a {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1439,7 +1439,7 @@ cpu42: cpu at 42 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <42>;
> + reg = <0x2a>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1457,7 +1457,7 @@ cpu42_intc: interrupt-controller {
> };
> };
>
> - cpu43: cpu at 43 {
> + cpu43: cpu at 2b {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1467,7 +1467,7 @@ cpu43: cpu at 43 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <43>;
> + reg = <0x2b>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1485,7 +1485,7 @@ cpu43_intc: interrupt-controller {
> };
> };
>
> - cpu44: cpu at 44 {
> + cpu44: cpu at 2c {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1495,7 +1495,7 @@ cpu44: cpu at 44 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <44>;
> + reg = <0x2c>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1513,7 +1513,7 @@ cpu44_intc: interrupt-controller {
> };
> };
>
> - cpu45: cpu at 45 {
> + cpu45: cpu at 2d {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1523,7 +1523,7 @@ cpu45: cpu at 45 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <45>;
> + reg = <0x2d>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1541,7 +1541,7 @@ cpu45_intc: interrupt-controller {
> };
> };
>
> - cpu46: cpu at 46 {
> + cpu46: cpu at 2e {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1551,7 +1551,7 @@ cpu46: cpu at 46 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <46>;
> + reg = <0x2e>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1569,7 +1569,7 @@ cpu46_intc: interrupt-controller {
> };
> };
>
> - cpu47: cpu at 47 {
> + cpu47: cpu at 2f {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1579,7 +1579,7 @@ cpu47: cpu at 47 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <47>;
> + reg = <0x2f>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1597,7 +1597,7 @@ cpu47_intc: interrupt-controller {
> };
> };
>
> - cpu48: cpu at 48 {
> + cpu48: cpu at 30 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1607,7 +1607,7 @@ cpu48: cpu at 48 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <48>;
> + reg = <0x30>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1625,7 +1625,7 @@ cpu48_intc: interrupt-controller {
> };
> };
>
> - cpu49: cpu at 49 {
> + cpu49: cpu at 31 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1635,7 +1635,7 @@ cpu49: cpu at 49 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <49>;
> + reg = <0x31>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1653,7 +1653,7 @@ cpu49_intc: interrupt-controller {
> };
> };
>
> - cpu50: cpu at 50 {
> + cpu50: cpu at 32 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1663,7 +1663,7 @@ cpu50: cpu at 50 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <50>;
> + reg = <0x32>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1681,7 +1681,7 @@ cpu50_intc: interrupt-controller {
> };
> };
>
> - cpu51: cpu at 51 {
> + cpu51: cpu at 33 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1691,7 +1691,7 @@ cpu51: cpu at 51 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <51>;
> + reg = <0x33>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1709,7 +1709,7 @@ cpu51_intc: interrupt-controller {
> };
> };
>
> - cpu52: cpu at 52 {
> + cpu52: cpu at 34 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1719,7 +1719,7 @@ cpu52: cpu at 52 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <52>;
> + reg = <0x34>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1737,7 +1737,7 @@ cpu52_intc: interrupt-controller {
> };
> };
>
> - cpu53: cpu at 53 {
> + cpu53: cpu at 35 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1747,7 +1747,7 @@ cpu53: cpu at 53 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <53>;
> + reg = <0x35>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1765,7 +1765,7 @@ cpu53_intc: interrupt-controller {
> };
> };
>
> - cpu54: cpu at 54 {
> + cpu54: cpu at 36 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1775,7 +1775,7 @@ cpu54: cpu at 54 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <54>;
> + reg = <0x36>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1793,7 +1793,7 @@ cpu54_intc: interrupt-controller {
> };
> };
>
> - cpu55: cpu at 55 {
> + cpu55: cpu at 37 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1803,7 +1803,7 @@ cpu55: cpu at 55 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <55>;
> + reg = <0x37>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1821,7 +1821,7 @@ cpu55_intc: interrupt-controller {
> };
> };
>
> - cpu56: cpu at 56 {
> + cpu56: cpu at 38 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1831,7 +1831,7 @@ cpu56: cpu at 56 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <56>;
> + reg = <0x38>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1849,7 +1849,7 @@ cpu56_intc: interrupt-controller {
> };
> };
>
> - cpu57: cpu at 57 {
> + cpu57: cpu at 39 {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1859,7 +1859,7 @@ cpu57: cpu at 57 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <57>;
> + reg = <0x39>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1877,7 +1877,7 @@ cpu57_intc: interrupt-controller {
> };
> };
>
> - cpu58: cpu at 58 {
> + cpu58: cpu at 3a {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1887,7 +1887,7 @@ cpu58: cpu at 58 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <58>;
> + reg = <0x3a>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1905,7 +1905,7 @@ cpu58_intc: interrupt-controller {
> };
> };
>
> - cpu59: cpu at 59 {
> + cpu59: cpu at 3b {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1915,7 +1915,7 @@ cpu59: cpu at 59 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <59>;
> + reg = <0x3b>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1933,7 +1933,7 @@ cpu59_intc: interrupt-controller {
> };
> };
>
> - cpu60: cpu at 60 {
> + cpu60: cpu at 3c {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1943,7 +1943,7 @@ cpu60: cpu at 60 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <60>;
> + reg = <0x3c>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1961,7 +1961,7 @@ cpu60_intc: interrupt-controller {
> };
> };
>
> - cpu61: cpu at 61 {
> + cpu61: cpu at 3d {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1971,7 +1971,7 @@ cpu61: cpu at 61 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <61>;
> + reg = <0x3d>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -1989,7 +1989,7 @@ cpu61_intc: interrupt-controller {
> };
> };
>
> - cpu62: cpu at 62 {
> + cpu62: cpu at 3e {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -1999,7 +1999,7 @@ cpu62: cpu at 62 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <62>;
> + reg = <0x3e>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> @@ -2017,7 +2017,7 @@ cpu62_intc: interrupt-controller {
> };
> };
>
> - cpu63: cpu at 63 {
> + cpu63: cpu at 3f {
> compatible = "thead,c920", "riscv";
> device_type = "cpu";
> riscv,isa = "rv64imafdc";
> @@ -2027,7 +2027,7 @@ cpu63: cpu at 63 {
> "zifencei", "zihpm", "zfh",
> "xtheadvector";
> thead,vlenb = <16>;
> - reg = <63>;
> + reg = <0x3f>;
> i-cache-block-size = <64>;
> i-cache-size = <65536>;
> i-cache-sets = <512>;
> --
> 2.53.0
>
--
Best Regards
Guo Ren
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