[PATCH 1/2] driver: reset: spacemit-p1: add driver for poweroff/reboot

Aurelien Jarno aurelien at aurel32.net
Sun Sep 28 11:01:01 PDT 2025


Hi Yixun,

On 2025-09-28 08:02, Yixun Lan wrote:
> Hi Aurelien, 
> 
> On 00:07 Sun 28 Sep     , Aurelien Jarno wrote:
> > This driver implements poweroff/reboot support for the SpacemiT P1 PMIC
> > chip, which is commonly paired with the SpacemiT K1 SoC.
> > 
> > The SpacemiT P1 support is implemented as a MFD driver, so the access is
> > done directly through the regmap interface. Reboot or poweroff is
> > triggered by setting a specific bit in a control register, which is
> > automatically cleared by the hardware afterwards.
> > 
> > Signed-off-by: Aurelien Jarno <aurelien at aurel32.net>
> > ---
> >  drivers/power/reset/Kconfig              |  9 +++
> >  drivers/power/reset/Makefile             |  1 +
> >  drivers/power/reset/spacemit-p1-reboot.c | 88 ++++++++++++++++++++++++
> >  3 files changed, 98 insertions(+)
> >  create mode 100644 drivers/power/reset/spacemit-p1-reboot.c
> > 
> > diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
> > index 77ea3129c7080..5afef049760d6 100644
> > --- a/drivers/power/reset/Kconfig
> > +++ b/drivers/power/reset/Kconfig
> [snip]..
> > +
> > +static int spacemit_p1_reboot_probe(struct platform_device *pdev)
> > +{
> > +	struct device *dev = &pdev->dev;
> > +	struct regmap *regmap;
> > +	int ret;
> > +
> > +	regmap = dev_get_regmap(dev->parent, NULL);
> > +	if (!regmap)
> > +		return -ENODEV;
> > +
> > +	ret = devm_register_power_off_handler(dev, &spacemit_p1_pwroff_handler, regmap);
> > +	if (ret) {
> > +		dev_err(dev, "Failed to register power off handler: %d\n", ret);
> > +		return ret;
> suggest to simplify with dev_err_probe(), which will save few lines
> > +	}
> > +
> > +	ret = devm_register_restart_handler(dev, spacemit_p1_restart_handler, regmap);
> > +	if (ret) {
> > +		dev_err(dev, "Failed to register restart handler: %d\n", ret);
> > +		return ret;
> ditto

Thanks for the hint, that'll be in the next version.

Regards
Aurelien

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien at aurel32.net                     http://aurel32.net



More information about the linux-riscv mailing list