[PATCH v4 3/3] riscv: dts: spacemit: define a SPI controller node
Yixun Lan
dlan at gentoo.org
Thu Sep 25 21:07:13 PDT 2025
Hi Alex,
On 07:17 Thu 25 Sep , Alex Elder wrote:
> Define a node for the fourth SoC SPI controller (number 3) on
> the SpacemiT K1 SoC.
>
> Enable it on the Banana Pi BPI-F3 board, which exposes this feature
> via its GPIO block:
> GPIO PIN 19: MOSI
> GPIO PIN 21: MISO
> GPIO PIN 23: SCLK
> GPIO PIN 24: SS (inverted)
>
> Define pincontrol configurations for the pins as used on that board.
>
> (This was tested using a GigaDevice GD25Q64E SPI NOR chip.)
>
> Signed-off-by: Alex Elder <elder at riscstar.com>
>
Reviewed-by: Yixun Lan <dlan at gentoo.org>
--
Yixun Lan (dlan)
More information about the linux-riscv
mailing list