[PATCH RESEND v6 2/2] riscv: Allow for riscv-clock to pick up mmio address.
Vivian Wang
wangruikang at iscas.ac.cn
Wed Sep 24 08:35:31 PDT 2025
Hi Aleksa,
On 9/24/25 19:10, Aleksa Paunovic via B4 Relay wrote:
> From: Aleksa Paunovic <aleksa.paunovic at htecgroup.com>
>
> Allow faster rdtime access via GCR.U mtime shadow register on RISC-V
> devices. This feature can be enabled by setting GCRU_TIME_MMIO
> during configuration.
> Reformat the clint timer to use the same mechanism if RISCV_M_MODE is set.
>
> Signed-off-by: Aleksa Paunovic <aleksa.paunovic at htecgroup.com>
> ---
> arch/riscv/include/asm/clint.h | 26 ----------------
> arch/riscv/include/asm/timex.h | 63 ++++++++++++++++++++++-----------------
> drivers/clocksource/Kconfig | 12 ++++++++
> drivers/clocksource/timer-clint.c | 20 ++++++-------
> drivers/clocksource/timer-riscv.c | 34 +++++++++++++++++++++
> 5 files changed, 90 insertions(+), 65 deletions(-)
I have a question about the design of this patch. Do we *really* have to
combine the GCR.U timer driver into the existing riscv,timer driver?
It seems at least to me that all we really need is a *new* clocksource
driver with a higher "rating" than riscv_clocksource and
clint_clocksource, and the kernel will prefer it anyway.
In your patch, you're effectively making timer-riscv a driver for both
riscv,timer and mips,p8700-gcru, while including a whole bunch of
indirections and renamings. I think the structure of this patch would be
much simpler if it was just adding a new clocksource driver.
Please consider.
Thanks,
Vivian "dramforever" Wang
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