[PATCH v3] riscv: Use Zalrsc extension to implement atomic functions

[Aleksa Paunovic]

On 9/1/25 12:38, Aleksa Paunovic via B4 Relay wrote:

> From: Chao-ying Fu <cfu at mips.com>
>
> Use only LR/SC instructions to implement atomic functions.
>
> Add config ERRATA_MIPS_P8700_AMO_ZALRSC.
>
> Signed-off-by: Chao-ying Fu <cfu at mips.com>
> Signed-off-by: Aleksandar Rikalo <arikalo at gmail.com>
> Co-developed-by: Aleksa Paunovic <aleksa.paunovic at htecgroup.com>
> Signed-off-by: Aleksa Paunovic <aleksa.paunovic at htecgroup.com>
> ---
> This patch depends on [1], which implements errata support for the MIPS p8700.
>
> Changes in v3:
> - Use alternatives to replace AMO instructions with LR/SC
> - Rebase on Alexandre Ghiti's "for-next" branch.
> - Link to v2: https://lore.kernel.org/linux-riscv/20241225082412.36727-1-arikalo@gmail.com/
>
> [1] https://lore.kernel.org/linux-riscv/20250724-p8700-pause-v5-0-a6cbbe1c3412@htecgroup.com/
> ---
>  arch/riscv/Kconfig.errata                    |  11 ++
>  arch/riscv/errata/mips/errata.c              |  13 +-
>  arch/riscv/include/asm/atomic.h              |  29 ++--
>  arch/riscv/include/asm/bitops.h              |  28 ++--
>  arch/riscv/include/asm/cmpxchg.h             |   9 +-
>  arch/riscv/include/asm/errata_list.h         | 215 +++++++++++++++++++++++++++
>  arch/riscv/include/asm/errata_list_vendors.h |   3 +-
>  arch/riscv/include/asm/futex.h               |  41 ++---
>  arch/riscv/kernel/entry.S                    |  10 +-
>  9 files changed, 291 insertions(+), 68 deletions(-)

Gentle ping.

We would appreciate any comments on these changes.  I could split this into multiple patches if that would make it easier to read.

Best regards,
Aleksa