[PATCH 6/7] riscv: dts: Add Tenstorrent Blackhole A0 SoC PCIe cards
Ben Dooks
ben.dooks at codethink.co.uk
Tue Sep 16 11:25:59 PDT 2025
On 16/09/2025 18:27, Drew Fustini wrote:
> On Tue, Sep 16, 2025 at 02:56:05PM +0100, Ben Dooks wrote:
>> On 15/09/2025 18:52, Drew Fustini wrote:
>>> On Mon, Sep 15, 2025 at 05:47:08PM +0100, Conor Dooley wrote:
>>>> On Sat, Sep 13, 2025 at 02:31:05PM -0700, Drew Fustini wrote:
>>>>> new file mode 100644
>>>>> index 0000000000000000000000000000000000000000..b2b08023643a2cebd4f924579024290bb355c9b3
>>>>> --- /dev/null
>>>>> +++ b/arch/riscv/boot/dts/tenstorrent/blackhole-a0-card.dts
>>>>> @@ -0,0 +1,14 @@
>>>>> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
>>>>> +/dts-v1/;
>>>>> +
>>>>> +#include "blackhole-a0.dtsi"
>>>>> +
>>>>> +/ {
>>>>> + model = "Tenstorrent Blackhole A0 SoC PCIe card";
>>>>> + compatible = "tenstorrent,blackhole-a0-card", "tenstorrent,blackhole-a0";
>>>>> +
>>>>> + memory at 0 {
>>>>> + device_type = "memory";
>>>>> + reg = <0x4000 0x30000000 0x1 0x00000000>;
>>>>
>>>> This isn't at address zero as the node address claims.
>>>
>>> Thanks, I'll fix the unit address.
>>
>> Is it time to just assume any dtc can handle a 64bit number?
>
> Is it not valid for me to use the 64 bit hex number in the unit address?
>
>
No, the reg = < > contents. It is a right pain to read split 32bit
numbers and I thought dtc had been updated to allow 64bit now?
--
Ben Dooks http://www.codethink.co.uk/
Senior Engineer Codethink - Providing Genius
https://www.codethink.co.uk/privacy.html
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