[PATCH v3] riscv: dts: spacemit: add UART pinctrl combinations

Yixun Lan dlan at gentoo.org
Tue Sep 16 01:57:25 PDT 2025


Hi Hendrik,

On 08:47 Tue 16 Sep     , Hendrik Hamerlinck wrote:
> Add UART pinctrl configurations based on the SoC datasheet and the
> downstream Bianbu Linux tree. The drive strength values were taken from
> the downstream implementation, which uses medium drive strength.
> CTS/RTS are moved to separate *-cts-rts-cfg states so boards can enable
> hardware flow control conditionally.
> 
> Signed-off-by: Hendrik Hamerlinck <hendrik.hamerlinck at hammernet.be>
Reviewed-by: Yixun Lan <dlan at gentoo.org>

> ---
> Changes in v3:
> - Added /omit-if-no-ref/ to pinctrl states to reduce DT size
> 
> Changes in v2:
> - Split cts/rts into separate pinctrl configs as suggested
> - Removed options from board DTS files to keep them cleaner
> ---

-- 
Yixun Lan (dlan)



More information about the linux-riscv mailing list