Hey folks,
Please pull my 6.19 soc driver changes.
Cheers,
Conor.
The following changes since commit 3a8660878839faadb4f1a6dd72c3179c1df56787:
Linux 6.18-rc1 (2025-10-12 13:42:36 -0700)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ soc-drivers-for-v6.19
for you to fetch changes up to 66c6ceb41ed375773491c5d024167a2cbe6fe944:
MAINTAINERS: rename Microchip RISC-V entry (2025-11-11 16:52:30 +0000)
----------------------------------------------------------------
RISC-V soc-drivers for v6.19
Microchip:
Add bindings and mfd drivers for two syscon regions on PolarFire SoC,
needed as part of a rework of the devicetree to permit supporting,
among other things, pinctrl sanely and avoiding the "new" pic64gx SoC
ever using the original incorrect clock nodes. Fiddle with the Microchip
RISC-V MAINTAINERS entry to add these drivers and avoid branding it FPGA
only.
Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
----------------------------------------------------------------
Conor Dooley (4):
dt-bindings: soc: microchip: document the simple-mfd syscon on PolarFire SoC
soc: microchip: add mfd drivers for two syscon regions on PolarFire SoC
MAINTAINERS: add new soc drivers to Microchip RISC-V entry
MAINTAINERS: rename Microchip RISC-V entry
.../microchip/microchip,mpfs-mss-top-sysreg.yaml | 47 ++++++++++++++++++++++
MAINTAINERS | 4 +-
drivers/soc/microchip/Kconfig | 12 ++++++
drivers/soc/microchip/Makefile | 1 +
drivers/soc/microchip/mpfs-control-scb.c | 38 +++++++++++++++++
drivers/soc/microchip/mpfs-mss-top-sysreg.c | 44 ++++++++++++++++++++
6 files changed, 145 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-mss-top-sysreg.yaml
create mode 100644 drivers/soc/microchip/mpfs-control-scb.c
create mode 100644 drivers/soc/microchip/mpfs-mss-top-sysreg.c
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