[PATCH v2 0/5] Add Zilsd/Zclsd support in hwprobe and KVM
Pincheng Wang
pincheng.plct at isrc.iscas.ac.cn
Thu Nov 20 17:19:17 PST 2025
On 2025/8/27 00:29, Pincheng Wang wrote:
> This is v2 of a short series that adds kernel support for the ratified
> Zilsd (Load/Store pair) and Zclsd (Compressed Load/Store pair) RISC-V
> ISA extensions. The series enables kernel-side exposure so user-space
> (for example glibc) can detect and use these extensions via hwprobe and
> runtime checks.
>
> Thanks,
> Pincheng Wang
>
> Pincheng Wang (5):
> dt-bindings: riscv: add Zilsd and Zclsd extension descriptions
> riscv: add ISA extension parsing for Zilsd and Zclsd
> riscv: hwprobe: export Zilsd and Zclsd ISA extensions
> riscv: KVM: allow Zilsd and Zclsd extensions for Guest/VM
> KVM: riscv: selftests: add Zilsd and Zclsd extension to get-reg-list
> test
>
> Documentation/arch/riscv/hwprobe.rst | 8 +++++
> .../devicetree/bindings/riscv/extensions.yaml | 36 +++++++++++++++++++
> arch/riscv/include/asm/hwcap.h | 2 ++
> arch/riscv/include/uapi/asm/hwprobe.h | 2 ++
> arch/riscv/include/uapi/asm/kvm.h | 2 ++
> arch/riscv/kernel/cpufeature.c | 24 +++++++++++++
> arch/riscv/kernel/sys_hwprobe.c | 2 ++
> arch/riscv/kvm/vcpu_onereg.c | 2 ++
> .../selftests/kvm/riscv/get-reg-list.c | 6 ++++
> 9 files changed, 84 insertions(+)
>
Hi Paul,
I noticed that this patch has remained in the testing branch for some
time, while the other patches in the same batch have already moved into
the experimental/merged and for-next branch.
When testing locally by merging the current testing branch onto the
latest for-next, I observed merge conflicts in the related areas. I
would be glad to rebase the patch onto the current tree and send a new
version if that would help resolve the conflicts.
Please let me know whether you would prefer me to prepare a rebased v3,
or if the merge will be handled on your side.
Happy to rebase and resend if that would help.
Best regards,
Pincheng Wang
More information about the linux-riscv
mailing list