[PATCH fixes] riscv: Fix CONFIG_AS_HAS_INSN for new .insn usage
Andrew Jones
ajones at ventanamicro.com
Fri Nov 7 14:35:07 PST 2025
On Fri, Nov 07, 2025 at 02:56:59PM -0700, Nathan Chancellor wrote:
> After commit 44aa25c000b4 ("riscv: asm: use .insn for making custom
> instructions"), builds using LLVM older that 19 or binutils older than
> 2.38 fail with:
>
> arch/riscv/include/asm/vdso/processor.h: Assembler messages:
> arch/riscv/include/asm/vdso/processor.h:27: Error: unrecognized opcode `0x100000f'
> arch/riscv/include/asm/vdso/processor.h:27: Error: unrecognized opcode `0x100000f'
> arch/riscv/include/asm/vdso/processor.h:27: Error: unrecognized opcode `0x100000f'
> arch/riscv/include/asm/vdso/processor.h:27: Error: unrecognized opcode `0x100000f'
> make[4]: *** [scripts/Makefile.build:287: arch/riscv/kernel/vdso/vgettimeofday.o] Error 1
>
> In file included from <built-in>:4:
> In file included from lib/vdso/gettimeofday.c:6:
> In file included from include/vdso/datapage.h:21:
> In file included from include/vdso/processor.h:10:
> arch/riscv/include/asm/vdso/processor.h:23:2: error: expected instruction format
> 23 | ALT_RISCV_PAUSE();
> | ^
> arch/riscv/include/asm/errata_list.h:47:3: note: expanded from macro 'ALT_RISCV_PAUSE'
> 47 | RISCV_PAUSE, /* Original RISC‑V pause insn */ \
> | ^
> arch/riscv/include/asm/insn-def.h:259:21: note: expanded from macro 'RISCV_PAUSE'
> 259 | #define RISCV_PAUSE ASM_INSN_I("0x100000f")
> | ^
> arch/riscv/include/asm/asm.h:16:26: note: expanded from macro 'ASM_INSN_I'
> 16 | #define ASM_INSN_I(__x) ".insn " __x
> | ^
> <inline asm>:5:7: note: instantiated into assembly here
> 5 | .insn 0x100000f
> | ^
>
> binutils gained support for '.insn <value>' in 2.38 [1] and LLVM gained
> support in 19 [2]. Adjust the test for CONFIG_AS_HAS_INSN to ensure that
> all versions of .insn are supported before being used.
>
> Fixes: 44aa25c000b4 ("riscv: asm: use .insn for making custom instructions")
> Link: https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=a262b82fdbf4cda3b0648b1adc32245ca3f78b7a [1]
> Link: https://github.com/llvm/llvm-project/commit/2a086dce691e3cc34a2fc27f4fb255bb2cbbfac9 [2]
> Suggested-by: Andrew Jones <ajones at ventanamicro.com>
> Signed-off-by: Nathan Chancellor <nathan at kernel.org>
> ---
> arch/riscv/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 22cda9c452d2..fadec20b87a8 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -367,7 +367,7 @@ config RISCV_NONSTANDARD_CACHE_OPS
> systems to handle cache management.
>
> config AS_HAS_INSN
> - def_bool $(as-instr,.insn r 51$(comma) 0$(comma) 0$(comma) t0$(comma) t0$(comma) zero)
> + def_bool $(as-instr,.insn 0x100000f)
>
> config AS_HAS_OPTION_ARCH
> # https://github.com/llvm/llvm-project/commit/9e8ed3403c191ab9c4903e8eeb8f732ff8a43cb4
>
> ---
> base-commit: a882126c42fc53275ac91969d460d939191db7b0
> change-id: 20251107-riscv-fix-new-insn-usage-2261377c2d38
>
> Best regards,
> --
> Nathan Chancellor <nathan at kernel.org>
>
Thanks for posting this Nathan.
Reviewed-by: Andrew Jones <ajones at ventanamicro.com>
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