[PATCH v2 4/9] dt-bindings: interrupt-controller: add Andes machine-level software interrupt controller
Conor Dooley
conor at kernel.org
Tue May 6 09:24:33 PDT 2025
On Sat, May 03, 2025 at 11:18:24PM +0800, Ben Zong-You Xie wrote:
> Add the DT binding documentation for Andes machine-level software
> interrupt controller.
>
> In the Andes platform such as QiLai SoC, the PLIC module is instantiated a
> second time with all interrupt sources tied to zero as the software
> interrupt controller (PLICSW). PLICSW can generate machine-level software
> interrupts through programming its registers.
>
> Signed-off-by: Ben Zong-You Xie <ben717 at andestech.com>
Acked-by: Conor Dooley <conor.dooley at microchip.com>
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