[PATCH v2 2/5] riscv: misaligned: enable IRQs while handling misaligned accesses

[Alexandre Ghiti]

On 22/04/2025 18:23, Clément Léger wrote:
> We can safely reenable IRQs if coming from userspace. This allows to
> access user memory that could potentially trigger a page fault.
>
> Fixes: b686ecdeacf6 ("riscv: misaligned: Restrict user access to kernel memory")
> Signed-off-by: Clément Léger <cleger at rivosinc.com>
> ---
>   arch/riscv/kernel/traps.c | 12 ++++++++----
>   1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
> index b1d991c78a23..9c83848797a7 100644
> --- a/arch/riscv/kernel/traps.c
> +++ b/arch/riscv/kernel/traps.c
> @@ -220,19 +220,23 @@ static void do_trap_misaligned(struct pt_regs *regs, enum misaligned_access_type
>   {
>   	irqentry_state_t state;
>   
> -	if (user_mode(regs))
> +	if (user_mode(regs)) {
>   		irqentry_enter_from_user_mode(regs);
> -	else
> +		local_irq_enable();
> +	} else {
>   		state = irqentry_nmi_enter(regs);
> +	}
>   
>   	if (misaligned_handler[type].handler(regs))
>   		do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc,
>   			      misaligned_handler[type].type_str);
>   
> -	if (user_mode(regs))
> +	if (user_mode(regs)) {
> +		local_irq_disable();
>   		irqentry_exit_to_user_mode(regs);
> -	else
> +	} else {
>   		irqentry_nmi_exit(regs, state);
> +	}
>   }
>   
>   asmlinkage __visible __trap_section void do_trap_load_misaligned(struct pt_regs *regs)


Reviewed-by: Alexandre Ghiti <alexghiti at rivosinc.com>

Thanks,

Alex