[PATCH 1/5] riscv: misaligned: factorize trap handling
Maciej W. Rozycki
macro at orcam.me.uk
Thu May 1 13:51:54 PDT 2025
On Thu, 1 May 2025, Maciej W. Rozycki wrote:
> Hopefully not in the hardirq context though, and the usual approach is to
> keep interrupts disabled in the emulation path if arriving from the kernel
> mode as we don't expect kernel code to be ever paged out (the same applies
> to all kinds of machine instruction emulation).
s/code/data/, obviously.
Maciej
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