[PATCH net-next 1/7] net: stmmac: allow platforms to use PHY tx clock stop capability
Lad, Prabhakar
prabhakar.csengg at gmail.com
Tue Mar 11 06:20:02 PDT 2025
On Sun, Mar 9, 2025 at 3:02 PM Russell King (Oracle)
<rmk+kernel at armlinux.org.uk> wrote:
>
> Allow platform glue to instruct stmmac to make use of the PHY transmit
> clock stop capability when deciding whether to allow the transmit clock
> from the DWMAC core to be stopped.
>
> Cc: "Lad, Prabhakar" <prabhakar.csengg at gmail.com>
> Signed-off-by: Russell King (Oracle) <rmk+kernel at armlinux.org.uk>
> ---
> drivers/net/ethernet/stmicro/stmmac/stmmac.h | 1 +
> .../net/ethernet/stmicro/stmmac/stmmac_main.c | 16 ++++++++++++----
> include/linux/stmmac.h | 3 ++-
> 3 files changed, 15 insertions(+), 5 deletions(-)
>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj at bp.renesas.com>
Cheers,
Prabhakar
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
> index d87275c1cf23..bddfa0f4aa21 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
> @@ -306,6 +306,7 @@ struct stmmac_priv {
> struct timer_list eee_ctrl_timer;
> int lpi_irq;
> u32 tx_lpi_timer;
> + bool tx_lpi_clk_stop;
> bool eee_enabled;
> bool eee_active;
> bool eee_sw_timer_en;
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> index fa1d7d3a2f43..6f29804148b6 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> @@ -457,8 +457,7 @@ static void stmmac_try_to_start_sw_lpi(struct stmmac_priv *priv)
> /* Check and enter in LPI mode */
> if (!priv->tx_path_in_lpi_mode)
> stmmac_set_lpi_mode(priv, priv->hw, STMMAC_LPI_FORCED,
> - priv->plat->flags & STMMAC_FLAG_EN_TX_LPI_CLOCKGATING,
> - 0);
> + priv->tx_lpi_clk_stop, 0);
> }
>
> /**
> @@ -1104,13 +1103,18 @@ static int stmmac_mac_enable_tx_lpi(struct phylink_config *config, u32 timer,
>
> priv->eee_enabled = true;
>
> + /* Update the transmit clock stop according to PHY capability if
> + * the platform allows
> + */
> + if (priv->plat->flags & STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP)
> + priv->tx_lpi_clk_stop = tx_clk_stop;
> +
> stmmac_set_eee_timer(priv, priv->hw, STMMAC_DEFAULT_LIT_LS,
> STMMAC_DEFAULT_TWT_LS);
>
> /* Try to cnfigure the hardware timer. */
> ret = stmmac_set_lpi_mode(priv, priv->hw, STMMAC_LPI_TIMER,
> - priv->plat->flags & STMMAC_FLAG_EN_TX_LPI_CLOCKGATING,
> - priv->tx_lpi_timer);
> + priv->tx_lpi_clk_stop, priv->tx_lpi_timer);
>
> if (ret) {
> /* Hardware timer mode not supported, or value out of range.
> @@ -1269,6 +1273,10 @@ static int stmmac_phy_setup(struct stmmac_priv *priv)
> if (!(priv->plat->flags & STMMAC_FLAG_RX_CLK_RUNS_IN_LPI))
> priv->phylink_config.eee_rx_clk_stop_enable = true;
>
> + /* Set the default transmit clock stop bit based on the platform glue */
> + priv->tx_lpi_clk_stop = priv->plat->flags &
> + STMMAC_FLAG_EN_TX_LPI_CLOCKGATING;
> +
> mdio_bus_data = priv->plat->mdio_bus_data;
> if (mdio_bus_data)
> priv->phylink_config.default_an_inband =
> diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
> index b6f03ab12595..c4ec8bb8144e 100644
> --- a/include/linux/stmmac.h
> +++ b/include/linux/stmmac.h
> @@ -183,7 +183,8 @@ struct dwmac4_addrs {
> #define STMMAC_FLAG_INT_SNAPSHOT_EN BIT(9)
> #define STMMAC_FLAG_RX_CLK_RUNS_IN_LPI BIT(10)
> #define STMMAC_FLAG_EN_TX_LPI_CLOCKGATING BIT(11)
> -#define STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY BIT(12)
> +#define STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP BIT(12)
> +#define STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY BIT(13)
>
> struct plat_stmmacenet_data {
> int bus_id;
> --
> 2.30.2
>
More information about the linux-riscv
mailing list