[GIT PULL] RISC-V Fixes for 5.16-rc4
Palmer Dabbelt
palmer at dabbelt.com
Fri Jun 27 12:56:49 PDT 2025
The following changes since commit 19272b37aa4f83ca52bdf9c16d5d81bdd1354494:
Linux 6.16-rc1 (2025-06-08 13:44:43 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-5.16-rc4
for you to fetch changes up to c5136add3f9b4c23b8bbe5f4d722c95d4cfb936e:
riscv: export boot_cpu_hartid (2025-06-23 16:30:05 -0700)
----------------------------------------------------------------
There's a trivial merge conflict in .mailmap that's in next, but seems like
that's just bad luck on the timing.
----------------------------------------------------------------
RISC-V Fixes for 5.16-rc4
* .rodata is no longer linkd into PT_DYNAMIC, it was not supposed to be
there in the first place and resultst in invalid (but unused) entries.
This manifests as at least warnings in llvm-readelf.
* A fix for runtime constants with all-0 upper 32-bits. This should
only manifest on MMU=n kernels.
* A fix for context save/restore on systems using the T-Head vector
extensions.
* A fix for a conflicting "+r"/"r" register constraint in the VDSO
getrandom syscall wrapper, which is undefined behavior in clang.
* A fix for a missing register clobber in the RVV raid6 implementation.
This manifests as a NULL pointer reference on some compilers, but
could trigger in other ways.
* Misaligned accesses from userspace at faulting addresses are now
handled correctly.
* A fix for an incorrect optimization that allowed access_ok() to mark
invalid addresses as accessible, which can result in userspace
triggering BUG()s.
* A few fixes for build warnings, and an update to Drew's email address.
----------------------------------------------------------------
Alexandre Ghiti (1):
riscv: Fix sparse warning in vendor_extensions/sifive.c
Charles Mirabile (1):
riscv: fix runtime constant support for nommu kernels
Chunyan Zhang (1):
raid6: riscv: Fix NULL pointer dereference caused by a missing clobber
Drew Fustini (1):
MAINTAINERS: Update Drew Fustini's email address
Fangrui Song (1):
riscv: vdso: Exclude .rodata from the PT_DYNAMIC segment
Han Gao (1):
riscv: vector: Fix context save/restore with xtheadvector
Klara Modin (1):
riscv: export boot_cpu_hartid
Nam Cao (2):
Revert "riscv: misaligned: fix sleeping function called during misaligned access handling"
Revert "riscv: Define TASK_SIZE_MAX for __access_ok()"
Palmer Dabbelt (3):
Merge tag 'riscv-fixes-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux into fixes
Merge patch "Fix a segmentation fault also add raid6test for RISC-V support"
RISC-V: uaccess: Wrap the get_user_8 uaccess macro
Xi Ruoyao (1):
RISC-V: vDSO: Correct inline assembly constraints in the getrandom syscall wrapper
.mailmap | 1 +
MAINTAINERS | 2 +-
arch/riscv/include/asm/pgtable.h | 1 -
arch/riscv/include/asm/runtime-const.h | 2 +-
arch/riscv/include/asm/uaccess.h | 3 +-
arch/riscv/include/asm/vdso/getrandom.h | 2 +-
arch/riscv/include/asm/vector.h | 12 +++----
arch/riscv/kernel/setup.c | 1 +
arch/riscv/kernel/traps_misaligned.c | 4 +--
arch/riscv/kernel/vdso/vdso.lds.S | 2 +-
arch/riscv/kernel/vendor_extensions/sifive.c | 2 +-
lib/raid6/rvv.c | 48 ++++++++++++++++------------
12 files changed, 45 insertions(+), 35 deletions(-)
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