[External] Re: [PATCH] RISC-V: KVM: Delegate illegal instruction fault

[Radim Krčmář]

2025-06-22T18:11:49+08:00, Xu Lu <luxu.kernel at bytedance.com>:
> Hi Radim,
>
> On Fri, Jun 20, 2025 at 8:04 PM Radim Krčmář <rkrcmar at ventanamicro.com> wrote:
>>
>> 2025-06-20T17:17:20+08:00, Xu Lu <luxu.kernel at bytedance.com>:
>> > Delegate illegal instruction fault to VS mode in default to avoid such
>> > exceptions being trapped to HS and redirected back to VS.
>> >
>> > Signed-off-by: Xu Lu <luxu.kernel at bytedance.com>
>> > ---
>> > diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
>> > @@ -48,6 +48,7 @@
>> > +                                      BIT(EXC_INST_ILLEGAL)    | \
>>
>> You should also remove the dead code in kvm_riscv_vcpu_exit.
>
> I only want to delegate it by default. And KVM may still want to
> delegate different exceptions for different VMs like what it does for
> EXC_BREAKPOINT.

(I think we could easily reintroduce the code if KVM wants to do that in
 the future.  I also think that it's bad that this patch is doing an
 observable change without userspace involvement -- the counting of KVM
 SBI PMU events, but others will probably disagree with me on this.)

>                 So maybe it is better to reserve these codes?

Possibly, the current is acceptable if you have considered the
implications on PMU events.

>> And why not delegate the others as well?
>> (EXC_LOAD_MISALIGNED, EXC_STORE_MISALIGNED, EXC_LOAD_ACCESS,
>>  EXC_STORE_ACCESS, and EXC_INST_ACCESS.)
>
> Thanks for the reminder. I will have a test and resend the patch if it works.

The misaligned exceptions are already being worked on, so don't waste
your time on them, sorry.