[PATCH] RISC-V: KVM: Delegate illegal instruction fault

[Clément Léger]

On 20/06/2025 14:04, Radim Krčmář wrote:
> 2025-06-20T17:17:20+08:00, Xu Lu <luxu.kernel at bytedance.com>:
>> Delegate illegal instruction fault to VS mode in default to avoid such
>> exceptions being trapped to HS and redirected back to VS.
>>
>> Signed-off-by: Xu Lu <luxu.kernel at bytedance.com>
>> ---
>> diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
>> @@ -48,6 +48,7 @@
>> +					 BIT(EXC_INST_ILLEGAL)    | \
> 
> You should also remove the dead code in kvm_riscv_vcpu_exit.
> 
> And why not delegate the others as well?
> (EXC_LOAD_MISALIGNED, EXC_STORE_MISALIGNED, EXC_LOAD_ACCESS,
>  EXC_STORE_ACCESS, and EXC_INST_ACCESS.)

Currently, OpenSBI does not delegate misaligned exception by default and
handles misaligned access by itself, this is (partially) why we added
the FWFT SBI extension to request such delegation. Since some supervisor
software expect that default, they do not have code to handle misaligned
accesses emulation. So they should not be delegated by default.

Thanks,

Clément

> 
> Thanks.
> 
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