[PATCH 11/11] riscv: dts: sophgo: add pwm controller for SG2044

Chen Wang unicorn_wang at outlook.com
Wed Jun 11 02:53:54 PDT 2025


"sophgo,sg2044-pwm" should have not been in 6.16, submit this after that?

Others. LGTM.

Reviewed-by: Chen Wang <unicorn_wang at outlook.com>

Thanks

On 2025/6/9 7:28, Inochi Amaoto wrote:
> From: Longbin Li <looong.bin at gmail.com>
>
> Add pwm device node for SG2044.
>
> Signed-off-by: Longbin Li <looong.bin at gmail.com>
> Signed-off-by: Inochi Amaoto <inochiama at gmail.com>
> ---
>   arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts |  4 ++++
>   arch/riscv/boot/dts/sophgo/sg2044.dtsi               | 10 ++++++++++
>   2 files changed, 14 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts
> index 01340f21848f..b50c3a872d8b 100644
> --- a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts
> +++ b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts
> @@ -63,6 +63,10 @@ mcu: syscon at 17 {
>   	};
>   };
>   
> +&pwm {
> +	status = "okay";
> +};
> +
>   &sd {
>   	bus-width = <4>;
>   	no-sdio;
> diff --git a/arch/riscv/boot/dts/sophgo/sg2044.dtsi b/arch/riscv/boot/dts/sophgo/sg2044.dtsi
> index b65e491deb8f..f88cabe75790 100644
> --- a/arch/riscv/boot/dts/sophgo/sg2044.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/sg2044.dtsi
> @@ -347,6 +347,16 @@ portc: gpio-controller at 0 {
>   			};
>   		};
>   
> +		pwm: pwm at 704000c000 {
> +			compatible = "sophgo,sg2044-pwm";
> +			reg = <0x70 0x4000c000 0x0 0x1000>;
> +			#pwm-cells = <3>;
> +			clocks = <&clk CLK_GATE_APB_PWM>;
> +			clock-names = "apb";
> +			resets = <&rst RST_PWM>;
> +			status = "disabled";
> +		};
> +
>   		syscon: syscon at 7050000000 {
>   			compatible = "sophgo,sg2044-top-syscon", "syscon";
>   			reg = <0x70 0x50000000 0x0 0x1000>;



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