[PATCH net 0/3] Fix broken link with TH1520 GMAC when linkspeed changes

[Drew Fustini]

On Tue, Jul 29, 2025 at 09:37:31AM +0000, Yao Zi wrote:
> It's noted that on TH1520 SoC, the GMAC's link becomes broken after
> the link speed is changed (for example, running ethtool -s eth0 speed
> 100 on the peer when negotiated to 1Gbps), but the GMAC could function
> normally if the speed is brought back to the initial.
> 
> Just like many other SoCs utilizing STMMAC IP, we need to adjust the TX
> clock supplying TH1520's GMAC through some SoC-specific glue registers
> when linkspeed changes. But it's found that after the full kernel
> startup, reading from them results in garbage and writing to them makes
> no effect, which is the cause of broken link.
> 
> Further testing shows perisys-apb4-hclk must be ungated for normal
> access to Th1520 GMAC APB glue registers, which is neither described in
> dt-binding nor acquired by the driver.
> 
> This series expands the dt-binding of TH1520's GMAC to allow an extra
> "APB glue registers interface clock", instructs the driver to acquire
> and enable the clock, and finally supplies CLK_PERISYS_APB4_HCLK for
> TH1520's GMACs in SoC devicetree.
> 
> Yao Zi (3):
>   dt-bindings: net: thead,th1520-gmac: Describe APB interface clock
>   net: stmmac: thead: Get and enable APB clock on initialization
>   riscv: dts: thead: Add APB clocks for TH1520 GMACs
> 
>  .../devicetree/bindings/net/thead,th1520-gmac.yaml     |  8 ++++++--
>  arch/riscv/boot/dts/thead/th1520.dtsi                  | 10 ++++++----
>  drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c      |  6 ++++++
>  3 files changed, 18 insertions(+), 6 deletions(-)
> 
> -- 
> 2.50.1
> 

Thanks for fixing this issue. I've tested this series on next-20250729
with my LPi4a. I'm able to change the speed from 1000 to 100 and back to
1000. The network continues to work without any problems through those
transistions.

Tested-by: Drew Fustini <fustini at kernel.org>