[PATCH 02/11] riscv: update asm call site in `call_on_irq_stack` to setup correct label
Heinrich Schuchardt
heinrich.schuchardt at canonical.com
Thu Jul 24 23:23:44 PDT 2025
On 25.07.25 01:36, Deepak Gupta wrote:
> Call sites written in asm performing indirect call, they need to setup
> label register (t2/x7) with correct label.
>
> Currently first kernel was compiled with `-save-temps` option and
> normalized function signature string is captured and then placed at the
> asm callsite.
>
> TODO: to write a macro wrapper with toolchain support.
>
> Signed-off-by: Deepak Gupta <debug at rivosinc.com>
> ---
> arch/riscv/kernel/entry.S | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
> index 2660faf52232..598e17e800ae 100644
> --- a/arch/riscv/kernel/entry.S
> +++ b/arch/riscv/kernel/entry.S
> @@ -389,6 +389,7 @@ SYM_FUNC_START(call_on_irq_stack)
> load_per_cpu t0, irq_stack_ptr, t1
> li t1, IRQ_STACK_SIZE
> add sp, t0, t1
> + lui t2, %lpad_hash("FvP7pt_regsE")
In patch 1 you use lpad 0 due to missing tool support for signature hashing.
Wouldn't it be preferable to have a first patch series introducing
landing pad support with lpad 0 and once tool support for signature
hashing has landed create a second patch series using tags?
Such a first patch series would not have to be an RFC but might be
merged soon.
Best regards
Heinrich
> jalr a1
>
> /* Switch back to the thread shadow call stack */
>
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