[External] Re: [PATCH RESEND] irqchip: riscv: Order normal writes and IPI writes

[Arnd Bergmann]

On Mon, Jan 27, 2025, at 17:37, Xu Lu wrote:
> On Tue, Jan 28, 2025 at 12:23 AM Arnd Bergmann <arnd at arndb.de> wrote:
>> On Mon, Jan 27, 2025, at 10:38, Xu Lu wrote:
>>
>> thead_aclint_sswi_ipi_clear() seems to have the same bug,
>> it also uses the _relaxed() version for no apparent reason.
>
>
> There seems no need to modify thead_aclint_sswi_ipi_clear() as it only
> clears pending IPI on current hart. No other harts require to see
> strict order between preceding memory writes and this ACLINT MMIO
> write. Please correct me if I missed anything.

My point was that you should always default to the normal operations,
since the relaxed ones keep causing problems. If you still think it's
important to use writel_relaxed() in thead_aclint_sswi_ipi_clear(),
please add a comment explaining how you have shown that it's correct
and why it matters, otherwise convert them both.

      Arnd