[PATCH v3 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2042 MSI

[Inochi Amaoto]

On Wed, Jan 22, 2025 at 09:51:05PM +0800, Chen Wang wrote:
> 
> On 2025/1/20 10:42, Inochi Amaoto wrote:
> > On Wed, Jan 15, 2025 at 02:33:23PM +0800, Chen Wang wrote:
> [......]
> > > +  reg:
> > > +    items:
> > > +      - description: msi doorbell address
> > > +      - description: clear register
> > > +
> > > +  reg-names:
> > > +    items:
> > > +      - const: doorbell
> > > +      - const: clr
> > please reverse the items order, the clr addr is more suitable
> > as the MMIO device address when writing device node. doorbeel
> > address is just a IO address and can not be seen from CPU.
> 
> I find dtbcheck will report error if order is switched.
> 

You should also change the unit address to avoid error.
I think you forgot it.

> On SG2042, address of doorbell is ahead of clr.
> 

It is the same on SG2044, but there is a problem that the
doorbell addr is a IO address and it is not suitable to
represent the device addr in the dtb. It also lead to a
weird unit address on SG2044 which is hard to understand.

Regards,
Inochi