[PATCH v3 1/5] dt-bindings: pci: Add Sophgo SG2042 PCIe host
Bjorn Helgaas
helgaas at kernel.org
Wed Feb 19 10:22:47 PST 2025
On Wed, Feb 12, 2025 at 01:54:11PM +0800, Chen Wang wrote:
> On 2025/2/12 12:25, Bjorn Helgaas wrote:
> [......]
> > > pcie_rc1 and pcie_rc2 share registers in cdns_pcie1_ctrl. By using
> > > different "sophgo,core-id" values, they can distinguish and access
> > > the registers they need in cdns_pcie1_ctrl.
> > Where does cdns_pcie1_ctrl fit in this example? Does that enclose
> > both pcie_rc1 and pcie_rc2?
>
> cdns_pcie1_ctrl is defined as a syscon node, which contains registers
> shared by pcie_rc1 and pcie_rc2. In the binding yaml file, I drew a diagram
> to describe the relationship between them, copy here for your quick
> reference:
>
> + +-- Core (Link0) <---> pcie_rc1 +-----------------+
> + | | |
> + Cadence IP 2 --+ | cdns_pcie1_ctrl |
> + | | |
> + +-- Core (Link1) <---> pcie_rc2 +-----------------+
>
> The following is an example with cdns_pcie1_ctrl added. For simplicity, I
> deleted pcie_rc0.
Looks good. It would be nice if there were some naming similarity or
comment or other hint to connect sophgo,core-id with the syscon node.
> pcie_rc1: pcie at 7062000000 {
> compatible = "sophgo,sg2042-pcie-host";
> ...... // host bride level properties
> linux,pci-domain = <1>;
> sophgo,core-id = <0>;
> sophgo,syscon-pcie-ctrl = <&cdns_pcie1_ctrl>;
> port {
> // port level properties
> vendor-id = <0x1f1c>;
> device-id = <0x2042>;
> num-lanes = <2>;
> };
> };
>
> pcie_rc2: pcie at 7062800000 {
> compatible = "sophgo,sg2042-pcie-host";
> ...... // host bride level properties
> linux,pci-domain = <2>;
> sophgo,core-id = <1>;
> sophgo,syscon-pcie-ctrl = <&cdns_pcie1_ctrl>;
> port {
> // port level properties
> vendor-id = <0x1f1c>;
> device-id = <0x2042>;
> num-lanes = <2>;
> }
>
> };
>
> cdns_pcie1_ctrl: syscon at 7063800000 {
> compatible = "sophgo,sg2042-pcie-ctrl", "syscon";
> reg = <0x70 0x63800000 0x0 0x800000>;
> };
>
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