[PATCH] riscv: dts: starfive: fml13v01: enable pcie1

Conor Dooley conor at kernel.org
Wed Feb 19 09:39:56 PST 2025


From: Conor Dooley <conor.dooley at microchip.com>

On Fri, 07 Feb 2025 17:36:18 +0800, Sandie Cao wrote:
> Starfive Soc common defines GPIO28 as pcie1 reset, GPIO21 as pcie1 wakeup;
> But the FML13V01 board uses GPIO21 as pcie1 reset, GPIO28 as pcie1 wakeup;
> redefine pcie1 gpio and enable pcie1 for pcie based Wi-Fi.
> 
> 

Applied to riscv-dt-for-next, thanks!

[1/1] riscv: dts: starfive: fml13v01: enable pcie1
      https://git.kernel.org/conor/c/57b5369f3668

Thanks,
Conor.



More information about the linux-riscv mailing list