[PATCH v2 3/5] riscv: dts: starfive: jh7110-common: assign 24MHz clock-frequency to uart0
Emil Renner Berthing
emil.renner.berthing at canonical.com
Wed Feb 5 02:29:30 PST 2025
E Shattow wrote:
> Set uart0 clock-frequency for better compatibility with operating system
> and downstream boot loader SPL secondary program loader.
>
> Signed-off-by: E Shattow <e at freeshell.de>
> ---
> arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> index 8a59c3001339..6bb13af82147 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> @@ -635,6 +635,7 @@ GPOEN_DISABLE,
> };
>
> &uart0 {
> + clock-frequency = <24000000>;
> pinctrl-names = "default";
> pinctrl-0 = <&uart0_pins>;
> status = "okay";
The uart0 node already has a reference to the uart0_core clock, so it shouldn't
need this property.
/Emil
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