[PATCH v2] dt-bindings: riscv: update ratified version of h, svinval, svnapot, svpbmt

[Conor Dooley]

On Thu, Dec 25, 2025 at 02:24:20PM +0800, Guodong Xu wrote:
> The descriptions for h, svinval, svnapot, and svpbmt extensions currently
> reference the "20191213 version of the privileged ISA specification".
> While an Unprivileged ISA document exists with that date, there is no
> corresponding ratified Privileged ISA specification.
> 
> These extensions were ratified in the RISC-V Instruction Set Manual,
> Volume II: Privileged Architecture, Version 20211203. Update the
> descriptions to reference the correct specification version.
> 
> RISC-V International hosts a website [1] for ratified specifications.
> Following the "Ratified ISA Specifications", historical versions of
> Volume II Privileged ISA can be found.
> 
> Link: https://riscv.org/specifications/ratified/ [1]
> Fixes: aeb71e42caae ("dt-bindings: riscv: deprecate riscv,isa")
> Acked-by: Conor Dooley <conor.dooley at microchip.com>
> Signed-off-by: Guodong Xu <guodong at riscstar.com>

I've put this on my dt-fixes branch, but shout Paul if you'd rather this
went via you.
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