[PATCH v2 10/13] dt-bindings: riscv: Add Sha and its comprised extensions

Alex Elder elder at riscstar.com
Sun Dec 28 15:50:30 PST 2025


On 12/28/25 6:43 AM, Guodong Xu wrote:
> Hi, Alex
> 
> On Sat, Dec 27, 2025 at 5:28 AM Alex Elder <elder at riscstar.com> wrote:
>>
>> On 12/22/25 7:04 AM, Guodong Xu wrote:
>>> Add descriptions for the Sha extension and the seven extensions it
>>> comprises: Shcounterenw, Shgatpa, Shtvala, Shvsatpa, Shvstvala, Shvstvecd,
>>> and Ssstateen.
>>>
>>> Sha is ratified in the RVA23 Profiles Version 1.0 (commit 0273f3c921b6
>>> "rva23/rvb23 ratified") as a new profile-defined extension that captures
>>> the full set of features that are mandated to be supported along with
>>> the H extension.
>>>
>>> Extensions Shcounterenw, Shgatpa, Shtvala, Shvsatpa, Shvstvala, Shvstvecd,
>>> and Ssstateen are ratified in the RISC-V Profiles Version 1.0 (commit
>>> b1d806605f87 "Updated to ratified state").
>>>
>>> The requirement status for Sha and its comprised extension in RISC-V
>>> Profiles are:
>>>    - Sha: Mandatory in RVA23S64
>>>    - H: Optional in RVA22S64; Mandatory in RVA23S64
>>>    - Shcounterenw: Optional in RVA22S64; Mandatory in RVA23S64
>>>    - Shgatpa: Optional in RVA22S64; Mandatory in RVA23S64
>>>    - Shtvala: Optional in RVA22S64; Mandatory in RVA23S64
>>>    - Shvsatpa: Optional in RVA22S64; Mandatory in RVA23S64
>>>    - Shvstvala: Optional in RVA22S64; Mandatory in RVA23S64
>>>    - Shvstvecd: Optional in RVA22S64; Mandatory in RVA23S64
>>>    - Ssstateen: Optional in RVA22S64; Mandatory in RVA23S64
>>>
>>> Add schema checks to enforce that Sha implies the presence of all its
>>> comprised extensions.
>>
>> Like patch 7 in your series, I *think* what you're doing
>> in trying to imply the presence of these other extensions
>> is actually requiring all those extensions to be present
>> *in addition* to just "Sha".  I don't think that's what
>> we want.
> 
> I tend to think this schema check block should be removed. Conor expressed
> similar design logic in his comments to my Patch 7/13 of v2 series.
> 
> If there is no objection, I will remove it.

Sounds good.	-Alex

> BR,
> Guodong
> 
> 
>>
>>                                          -Alex
>>
>>> Signed-off-by: Guodong Xu <guodong at riscstar.com>
>>> ---
>>> v2: New patch.
>>> ---
>>>    .../devicetree/bindings/riscv/extensions.yaml      | 79 ++++++++++++++++++++++
>>>    1 file changed, 79 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
>>> index ed7a88c0ab3b7dc7ad4a4d2fd300d6fb33ef050c..1066b7e65dab89704dbac449db4aa5605c95b9d3 100644
>>> --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
>>> +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
>>> @@ -128,6 +128,57 @@ properties:
>>>                version of the privileged ISA specification.
>>>
>>>            # multi-letter extensions, sorted alphanumerically
>>> +        - const: sha
>>> +          description: |
>>> +            The standard Sha extension for augmented hypervisor extension as
>>> +            ratified in RVA23 Profiles Version 1.0, with commit 0273f3c921b6
>>> +            ("rva23/rvb23 ratified").
>>> +
>>> +            Sha captures the full set of features that are mandated to be
>>> +            supported along with the H extension. Sha comprises the following
>>> +            extensions: H, Shcounterenw, Shgatpa, Shtvala, Shvsatpa, Shvstvala,
>>> +            Shvstvecd, and Ssstateen.
>>> +
>>> +        - const: shcounterenw
>>> +          description: |
>>> +            The standard Shcounterenw extension for support writable enables
>>> +            in hcounteren for any supported counter, as ratified in RISC-V
>>> +            Profiles Version 1.0, with commit b1d806605f87 ("Updated to
>>> +            ratified state.")
>>> +
>>> +        - const: shgatpa
>>> +          description: |
>>> +            The standard Shgatpa extension indicates that for each supported
>>> +            virtual memory scheme SvNN supported in satp, the corresponding
>>> +            hgatp SvNNx4 mode must be supported. The hgatp mode Bare must
>>> +            also be supported. It is ratified in RISC-V Profiles Version 1.0,
>>> +            with commit b1d806605f87 ("Updated to ratified state.")
>>> +
>>> +        - const: shtvala
>>> +          description: |
>>> +            The standard Shtvala extension for htval be written with the
>>> +            faulting guest physical address in all circumstances permitted by
>>> +            the ISA. It is ratified in RISC-V Profiles Version 1.0, with
>>> +            commit b1d806605f87 ("Updated to ratified state.")
>>> +
>>> +        - const: shvsatpa
>>> +          description: |
>>> +            The standard Shvsatpa extension for vsatp supporting all translation
>>> +            modes supported in satp, as ratified in RISC-V Profiles Version 1.0,
>>> +            with commit b1d806605f87 ("Updated to ratified state.")
>>> +
>>> +        - const: shvstvala
>>> +          description: |
>>> +            The standard Shvstvala extension for vstval provides all needed
>>> +            values as ratified in RISC-V Profiles Version 1.0, with commit
>>> +            b1d806605f87 ("Updated to ratified state.")
>>> +
>>> +        - const: shvstvecd
>>> +          description: |
>>> +            The standard Shvstvecd extension for vstvec supporting Direct mode,
>>> +            as ratified in RISC-V Profiles Version 1.0, with commit b1d806605f87
>>> +            ("Updated to ratified state.")
>>> +
>>>            - const: smaia
>>>              description: |
>>>                The standard Smaia supervisor-level extension for the advanced
>>> @@ -186,6 +237,12 @@ properties:
>>>                ratified at commit d70011dde6c2 ("Update to ratified state")
>>>                of riscv-j-extension.
>>>
>>> +        - const: ssstateen
>>> +          description: |
>>> +            The standard Ssstateen extension for supervisor-mode view of the
>>> +            state-enable extension, as ratified in RISC-V Profiles Version 1.0,
>>> +            with commit b1d806605f87 ("Updated to ratified state.")
>>> +
>>>            - const: sstc
>>>              description: |
>>>                The standard Sstc supervisor-level extension for time compare as
>>> @@ -813,6 +870,28 @@ properties:
>>>                    const: zbb
>>>                - contains:
>>>                    const: zbs
>>> +      # sha comprises the following extensions
>>> +      - if:
>>> +          contains:
>>> +            const: sha
>>> +        then:
>>> +          allOf:
>>> +            - contains:
>>> +                const: h
>>> +            - contains:
>>> +                const: shcounterenw
>>> +            - contains:
>>> +                const: shgatpa
>>> +            - contains:
>>> +                const: shtvala
>>> +            - contains:
>>> +                const: shvsatpa
>>> +            - contains:
>>> +                const: shvstvala
>>> +            - contains:
>>> +                const: shvstvecd
>>> +            - contains:
>>> +                const: ssstateen
>>>          # Zcb depends on Zca
>>>          - if:
>>>              contains:
>>>
>>




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