[PATCH v3 1/5] dt-bindings: soc: spacemit: add k3 syscon compatible

[Krzysztof Kozlowski]

On Fri, Dec 26, 2025 at 07:01:16PM +0800, Yixun Lan wrote:
> The SpacemiT K3 SoC clock IP is scattered over several different blocks,
> which are APBC, APBS, APMU, DCIU, MPMU, all of them are capable of
> generating clock and reset signals. APMU and MPMU have additional Power
> Domain management functionality.
> 
> Following is a brief list that shows devices managed in each block:
> 
> APBC: UART, GPIO, PWM, SPI, TIMER, I2S, IR, DR, TSEN, IPC, CAN
> APBS: various PPL clocks control
> APMU: CCI, CPU, CSI, ISP, LCD, USB, QSPI, DMA, VPU, GPU, DSI, PCIe, EMAC..
> DCID: SRAM, DMA, TCM
> MPMU: various PLL1 derived clocks, UART, WATCHDOG, I2S
> 
> Signed-off-by: Yixun Lan <dlan at gentoo.org>
> ---
>  .../devicetree/bindings/clock/spacemit,k1-pll.yaml |   9 +-
>  .../bindings/soc/spacemit/spacemit,k1-syscon.yaml  |  13 +-
>  include/dt-bindings/clock/spacemit,k3-clocks.h     | 390 +++++++++++++++++++++
>  3 files changed, 407 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml b/Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml
> index 06bafd68c00a..02ebbe4061e3 100644
> --- a/Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml
> +++ b/Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml
> @@ -4,14 +4,17 @@
>  $id: http://devicetree.org/schemas/clock/spacemit,k1-pll.yaml#
>  $schema: http://devicetree.org/meta-schemas/core.yaml#
>  
> -title: SpacemiT K1 PLL
> +title: SpacemiT K1/K3 PLL
>  
>  maintainers:
>    - Haylen Chu <heylenay at 4d2.org>
>  
>  properties:
>    compatible:
> -    const: spacemit,k1-pll
> +    contains:

No drop, there is no such syntax for this property, so you copied here
something completely different.

> +      enum:
> +        - spacemit,k1-pll
> +        - spacemit,k3-pll

Best regards,
Krzysztof