[PATCH v3 3/6] clk: anlogic: add cru support for Anlogic DR1V90 SoC

[Brian Masney]

Hi Junhui,

On Tue, Dec 16, 2025 at 11:39:43AM +0800, Junhui Liu wrote:
> +static long cru_div_gate_round_rate(struct clk_hw *hw, unsigned long rate,
> +				    unsigned long *prate)
> +{
> +	struct clk_divider *divider = to_clk_divider(hw);
> +
> +	return divider_round_rate(hw, rate, prate, divider->table,
> +				  divider->width, divider->flags);
> +}

The round_rate clk op is deprecated and I'm really close to being able
to remove this from the clk core. Please only use determine_rate()
below.

> +static int cru_div_gate_determine_rate(struct clk_hw *hw,
> +				       struct clk_rate_request *req)
> +{
> +	struct cru_div_gate *div_gate = hw_to_cru_div_gate(hw);
> +	struct clk_divider *divider = &div_gate->divider;
> +	unsigned long maxdiv, mindiv;
> +	int div = 0;
> +
> +	maxdiv = clk_div_mask(divider->width) + 1;
> +	mindiv = div_gate->min + 1;
> +
> +	div = DIV_ROUND_UP_ULL(req->best_parent_rate, req->rate);
> +	div = div > maxdiv ? maxdiv : div;
> +	div = div < mindiv ? mindiv : div;
> +
> +	req->rate = DIV_ROUND_UP_ULL(req->best_parent_rate, div);
> +
> +	return 0;
> +}

[snip]

> +const struct clk_ops dr1_cru_div_gate_ops = {
> +	.enable = cru_div_gate_enable,
> +	.disable = cru_div_gate_disable,
> +	.is_enabled = cru_div_gate_is_enabled,
> +	.recalc_rate = cru_div_gate_recalc_rate,
> +	.round_rate = cru_div_gate_round_rate,
> +	.determine_rate = cru_div_gate_determine_rate,

When round_rate() and determine_rate() are both defined in the provider,
only the determine_rate() will be used. Just drop your round_rate()
implementation.

I didn't look into anything else on this patch. This showed up on my
search for new implementations.

Brian