[PATCH v3 2/3] riscv: dts: add mailbox for Sophgo CV18XX series SoC

[Junhui Liu]

From: Yuntao Dai <d1581209858 at live.com>

Add mailbox node for Sophgo CV18XX series SoC.

Signed-off-by: Yuntao Dai <d1581209858 at live.com>
Signed-off-by: Junhui Liu <junhui.liu at pigmoral.tech>
---
 arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
index c18822ec849f353bc296965d2d600a3df314cff6..f7277288f03c024039054bdc4176fc95c2c8be52 100644
--- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
@@ -55,6 +55,13 @@ soc {
 		dma-noncoherent;
 		ranges;
 
+		mailbox: mailbox at 1900000 {
+			compatible = "sophgo,cv1800b-mailbox";
+			reg = <0x01900000 0x1000>;
+			interrupts = <101 IRQ_TYPE_LEVEL_HIGH>;
+			#mbox-cells = <2>;
+		};
+
 		clk: clock-controller at 3002000 {
 			reg = <0x03002000 0x1000>;
 			clocks = <&osc>;

-- 
2.49.0