[PATCH v2 00/10] riscv: sophgo: Introduce SG2044 SRD3-10 board support

[Chen Wang]

Hi, Inochi,

Will you apply this patchset on sophgo/for-next? I see there are changes 
just about dts/bindings.

Chen

On 2025/4/14 6:34, Inochi Amaoto wrote:
> Sophgo SG2044 SRD3-10 is an ATX board bases on Sophgo SG2044 SoC.
> This board includes 5 uart ports, 5 pcie x8 slots, 1 1G Ethernet port,
> 1 microSD slot.
>
> Introduce basic support for this board and Sophgo SG2044 SoC
>
> Changed from v1:
> - https://lore.kernel.org/all/20250407010616.749833-1-inochiama@gmail.com
> 1. apply Rob's tag
> 2. patch 1: new patch for grouping all similar compatible ids.
> 3. patch 7: remove unnecessary compatible check
> 4. patch 8: adapt for the new patch 1
> 5. patch 9: fix copyright e-mail
>
> Inochi Amaoto (10):
>    dt-bindings: i2c: dw: merge duplicate compatible entry.
>    dt-bindings: timer: Add Sophgo SG2044 ACLINT timer
>    dt-bindings: interrupt-controller: Add Sophgo SG2044 CLINT mswi
>    dt-bindings: interrupt-controller: Add Sophgo SG2044 PLIC
>    dt-bindings: reset: sophgo: Add SG2044 bindings.
>    dt-bindings: hwmon: Add Sophgo SG2044 external hardware monitor
>      support
>    dt-bindings: mmc: sdhci-of-dwcmhsc: Add Sophgo SG2044 support
>    dt-bindings: i2c: dw: Add Sophgo SG2044 SoC I2C controller
>    dt-bindings: riscv: sophgo: Add SG2044 compatible string
>    riscv: dts: sophgo: Add initial device tree of Sophgo SRD3-10
>
>   .../hwmon/sophgo,sg2042-hwmon-mcu.yaml        |    6 +-
>   .../bindings/i2c/snps,designware-i2c.yaml     |   12 +-
>   .../sifive,plic-1.0.0.yaml                    |    1 +
>   .../thead,c900-aclint-mswi.yaml               |    1 +
>   .../bindings/mmc/snps,dwcmshc-sdhci.yaml      |    3 +
>   .../bindings/reset/sophgo,sg2042-reset.yaml   |    7 +-
>   .../devicetree/bindings/riscv/sophgo.yaml     |    4 +
>   .../timer/thead,c900-aclint-mtimer.yaml       |    1 +
>   arch/riscv/boot/dts/sophgo/Makefile           |    1 +
>   arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi   | 3002 +++++++++++++++++
>   arch/riscv/boot/dts/sophgo/sg2044-reset.h     |  128 +
>   .../boot/dts/sophgo/sg2044-sophgo-srd3-10.dts |   32 +
>   arch/riscv/boot/dts/sophgo/sg2044.dtsi        |   86 +
>   13 files changed, 3275 insertions(+), 9 deletions(-)
>   create mode 100644 arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi
>   create mode 100644 arch/riscv/boot/dts/sophgo/sg2044-reset.h
>   create mode 100644 arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts
>   create mode 100644 arch/riscv/boot/dts/sophgo/sg2044.dtsi
>
> --
> 2.49.0
>