[PATCH v2 3/5] riscv: dts: starfive: jh7110-common: assign 24MHz clock-frequency to uart0

[E Shattow]

On 2/5/25 02:29, Emil Renner Berthing wrote:
> E Shattow wrote:
>> Set uart0 clock-frequency for better compatibility with operating system
>> and downstream boot loader SPL secondary program loader.
>>
>> Signed-off-by: E Shattow <e at freeshell.de>
>> ---
>>  arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
>> index 8a59c3001339..6bb13af82147 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
>> @@ -635,6 +635,7 @@ GPOEN_DISABLE,
>>  };
>>
>>  &uart0 {
>> +	clock-frequency = <24000000>;
>>  	pinctrl-names = "default";
>>  	pinctrl-0 = <&uart0_pins>;
>>  	status = "okay";
> 
> The uart0 node already has a reference to the uart0_core clock, so it shouldn't
> need this property.
> 
> /Emil

Okay. I'll drop this patch from next version of the series, and asking
on U-Boot mailing list what to do about it there [1]. Thanks for reviewing!

-E

1:
https://lore.kernel.org/u-boot/c0023d23-4614-40c5-b612-9c0cb5b4d8b1@freeshell.de/