[PATCH v7 3/6] clk: spacemit: Add clock support for SpacemiT K1 SoC

[Yixun Lan]

On 13:12 Mon 14 Apr     , Alex Elder wrote:
> On 4/12/25 2:44 AM, Haylen Chu wrote:
> > The clock tree of K1 SoC contains three main types of clock hardware
> > (PLL/DDN/MIX) and has control registers split into several multifunction
> > devices: APBS (PLLs), MPMU, APBC and APMU.
> > 
> > All register operations are done through regmap to ensure atomiciy
> 
> s/atomiciy/atomicity/
> 
> I think Yixun can tweak that for you.
> 
sure, I will take care of it..
(if there is no more iteration)

> > between concurrent operations of clock driver and reset,
> > power-domain driver that will be introduced in the future.
> > 
> > Signed-off-by: Haylen Chu <heylenay at 4d2.org>
> 
> This looks good to me!
> 
> Reviewed-by: Alex Elder <elder at riscstar.com>
> 
thanks
-- 
Yixun Lan (dlan)
Gentoo Linux Developer
GPG Key ID AABEFD55