[PATCH 2/7] dt-bindings: phy: spacemit: add K1 PCIe/USB3 combo PHY
Ze Huang
huangze at whut.edu.cn
Wed Apr 9 01:05:57 PDT 2025
On 4/7/25 9:20 PM, Krzysztof Kozlowski wrote:
> On 07/04/2025 14:38, Ze Huang wrote:
>> Introduce support for SpacemiT K1 PCIe/USB3 combo PHY controller.
>>
>> PCIe portA and USB3 controller share this phy, only one of them can work
>> at any given application scenario.
>>
>> Signed-off-by: Ze Huang <huangze at whut.edu.cn>
>> ---
>> .../bindings/phy/spacemit,k1-combphy.yaml | 53 ++++++++++++++++++++++
>> 1 file changed, 53 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/spacemit,k1-combphy.yaml b/Documentation/devicetree/bindings/phy/spacemit,k1-combphy.yaml
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..450157b65410b27129603ea1f3523776a1b0a75e
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/phy/spacemit,k1-combphy.yaml
>> @@ -0,0 +1,53 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/phy/spacemit,k1-combphy.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Spacemit K1 PCIe/USB3 PHY
>> +
>> +maintainers:
>> + - Ze Huang <huangze at whut.edu.cn>
>> +
>> +description:
>> + Combo PHY on SpacemiT K1 SoC.PCIe port A and USB3 controller share this
>> + phy, only one of PCIe port A and USB3 port can work at any given application
>> + scenario.
>> +
>> +properties:
>> + compatible:
>> + const: spacemit,k1-combphy
>> +
>> + reg:
>> + maxItems: 2
> List and describe the items instead
OK, they are phy control and usb/pcie selection
>
>> +
>> + reg-names:
>> + items:
>> + - const: phy_ctrl
> drop phy_
>
>> + - const: phy_sel
> ditto
Will do
>
>> +
>> + resets:
>> + maxItems: 1
>> +
>> + "#phy-cells":
>> + const: 1
> What is the cell argument?
It's usb/pcie selection, will add description
>
> Also no supplies?
vbus supply was included in dwc3 glue node
>
>
> Best regards,
> Krzysztof
>
>
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