[PATCH v2] drivers/perf: riscv: Align errno for unsupported perf event
Atish Patra
atishp at rivosinc.com
Thu Sep 12 06:48:29 PDT 2024
On 8/31/24 12:15 AM, Pu Lehui wrote:
> From: Pu Lehui <pulehui at huawei.com>
>
> RISC-V perf driver does not yet support PERF_TYPE_BREAKPOINT. It would
> be more appropriate to return -EOPNOTSUPP or -ENOENT for this type in
> pmu_sbi_event_map. Considering that other implementations return -ENOENT
> for unsupported perf types, let's synchronize this behavior. Due to this
> reason, a riscv bpf testcases perf_skip fail. Meanwhile, align that
> behavior to the rest of proper place.
>
> Signed-off-by: Pu Lehui <pulehui at huawei.com>
> ---
> drivers/perf/riscv_pmu_legacy.c | 4 ++--
> drivers/perf/riscv_pmu_sbi.c | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c
> index 04487ad7fba0..93c8e0fdb589 100644
> --- a/drivers/perf/riscv_pmu_legacy.c
> +++ b/drivers/perf/riscv_pmu_legacy.c
> @@ -22,13 +22,13 @@ static int pmu_legacy_ctr_get_idx(struct perf_event *event)
> struct perf_event_attr *attr = &event->attr;
>
> if (event->attr.type != PERF_TYPE_HARDWARE)
> - return -EOPNOTSUPP;
> + return -ENOENT;
> if (attr->config == PERF_COUNT_HW_CPU_CYCLES)
> return RISCV_PMU_LEGACY_CYCLE;
> else if (attr->config == PERF_COUNT_HW_INSTRUCTIONS)
> return RISCV_PMU_LEGACY_INSTRET;
> else
> - return -EOPNOTSUPP;
> + return -ENOENT;
> }
>
> /* For legacy config & counter index are same */
> diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> index 44d3951d009f..169c5157b916 100644
> --- a/drivers/perf/riscv_pmu_sbi.c
> +++ b/drivers/perf/riscv_pmu_sbi.c
> @@ -309,7 +309,7 @@ static void pmu_sbi_check_event(struct sbi_pmu_event_data *edata)
> ret.value, 0x1, SBI_PMU_STOP_FLAG_RESET, 0, 0, 0);
> } else if (ret.error == SBI_ERR_NOT_SUPPORTED) {
> /* This event cannot be monitored by any counter */
> - edata->event_idx = -EINVAL;
> + edata->event_idx = -ENOENT;
> }
> }
>
> @@ -543,7 +543,7 @@ static int pmu_sbi_event_map(struct perf_event *event, u64 *econfig)
> }
> break;
> default:
> - ret = -EINVAL;
> + ret = -ENOENT;
> break;
> }
>
Lgtm. Thanks for aligning the error codes in other places.
Reviewed-by: Atish Patra <atishp at rivosinc.com>
More information about the linux-riscv
mailing list