[PATCH 5/8] riscv: dts: thead: Adjust TH1520 GPIO labels
Drew Fustini
dfustini at tenstorrent.com
Mon Sep 2 21:06:58 PDT 2024
From: Emil Renner Berthing <emil.renner.berthing at canonical.com>
Adjust labels for the TH1520 GPIO controllers such that GPIOs can be
referenced by the names used by the documentation. Eg.
GPIO0_X -> <&gpio0 X Y>
GPIO1_X -> <&gpio1 X Y>
GPIO2_X -> <&gpio2 X Y>
GPIO3_X -> <&gpio3 X Y>
GPIO4_X -> <&gpio4 X Y>
AOGPIO_X -> <&aogpio X Y>
Remove labels for the parent GPIO devices that shouldn't need to be
referenced.
Tested-by: Thomas Bonnefille <thomas.bonnefille at bootlin.com>
Signed-off-by: Emil Renner Berthing <emil.renner.berthing at canonical.com>
Signed-off-by: Drew Fustini <dfustini at tenstorrent.com>
---
arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts | 2 ++
arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts | 2 ++
arch/riscv/boot/dts/thead/th1520.dtsi | 24 +++++++++++-----------
3 files changed, 16 insertions(+), 12 deletions(-)
diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
index be85e3aee56e..c48f6fd6387b 100644
--- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
+++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
@@ -17,6 +17,8 @@ aliases {
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
+ gpio4 = &gpio4;
+ gpio5 = &aogpio;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
index 9a3884a73e13..0ae2c20d5641 100644
--- a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
@@ -14,6 +14,8 @@ aliases {
gpio1 = &gpio1;
gpio2 = &gpio2;
gpio3 = &gpio3;
+ gpio4 = &gpio4;
+ gpio5 = &aogpio;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index 9889b557c494..ca93a265fa56 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -327,13 +327,13 @@ uart3: serial at ffe7f04000 {
status = "disabled";
};
- gpio2: gpio at ffe7f34000 {
+ gpio at ffe7f34000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xe7f34000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- portc: gpio-controller at 0 {
+ gpio2: gpio-controller at 0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -346,13 +346,13 @@ portc: gpio-controller at 0 {
};
};
- gpio3: gpio at ffe7f38000 {
+ gpio at ffe7f38000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xe7f38000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- portd: gpio-controller at 0 {
+ gpio3: gpio-controller at 0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -371,13 +371,13 @@ padctrl1_apsys: pinctrl at ffe7f3c000 {
clocks = <&apb_clk>;
};
- gpio0: gpio at ffec005000 {
+ gpio at ffec005000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xec005000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- porta: gpio-controller at 0 {
+ gpio0: gpio-controller at 0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -390,13 +390,13 @@ porta: gpio-controller at 0 {
};
};
- gpio1: gpio at ffec006000 {
+ gpio at ffec006000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xec006000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- portb: gpio-controller at 0 {
+ gpio1: gpio-controller at 0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -533,13 +533,13 @@ timer7: timer at ffffc3303c {
status = "disabled";
};
- ao_gpio0: gpio at fffff41000 {
+ gpio at fffff41000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xfff41000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- porte: gpio-controller at 0 {
+ aogpio: gpio-controller at 0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
@@ -558,13 +558,13 @@ padctrl_aosys: pinctrl at fffff4a000 {
clocks = <&aonsys_clk>;
};
- ao_gpio1: gpio at fffff52000 {
+ gpio at fffff52000 {
compatible = "snps,dw-apb-gpio";
reg = <0xff 0xfff52000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- portf: gpio-controller at 0 {
+ gpio4: gpio-controller at 0 {
compatible = "snps,dw-apb-gpio-port";
gpio-controller;
#gpio-cells = <2>;
--
2.34.1
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