[PATCH v2 0/5] Add some validation for vector, vector crypto and fp stuff
Conor Dooley
conor at kernel.org
Thu Oct 24 05:34:28 PDT 2024
From: Conor Dooley <conor.dooley at microchip.com>
Yo,
This series is partly leveraging Clement's work adding a validate
callback in the extension detection code so that things like checking
for whether a vector crypto extension is usable can be done like:
has_extension(<vector crypto>)
rather than
has_vector() && has_extension(<vector crypto>)
which Eric pointed out was a poor design some months ago.
The rest of this is adding some requirements to the bindings that
prevent combinations of extensions disallowed by the ISA.
Cheers,
Conor.
v2:
- Fix an inverted clause Clément pointed out
- Add Zvbb validation, that I had missed accidentally
- Drop the todo about checking the number of validation rounds,
I tried in w/ qemu's max cpu and things looked right
CC: Conor Dooley <conor at kernel.org>
CC: Rob Herring <robh at kernel.org>
CC: Krzysztof Kozlowski <krzk+dt at kernel.org>
CC: Paul Walmsley <paul.walmsley at sifive.com>
CC: Palmer Dabbelt <palmer at dabbelt.com>
CC: "Clément Léger" <cleger at rivosinc.com>
CC: Andy Chiu <andybnac at gmail.com>
CC: linux-riscv at lists.infradead.org
CC: devicetree at vger.kernel.org
CC: linux-kernel at vger.kernel.org
Conor Dooley (5):
RISC-V: add vector crypto extension validation checks
RISC-V: add f & d extension validation checks
dt-bindings: riscv: d requires f
dt-bindings: riscv: add vector sub-extension dependencies
dt-bindings: riscv: document vector crypto requirements
.../devicetree/bindings/riscv/extensions.yaml | 84 ++++++++++
arch/riscv/include/asm/cpufeature.h | 3 +
arch/riscv/kernel/cpufeature.c | 148 ++++++++++++------
3 files changed, 185 insertions(+), 50 deletions(-)
--
2.45.2
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