[PATCH v5 3/3] riscv: dts: sophgo: Add SARADC description for Sophgo CV1800B

Inochi Amaoto inochiama at gmail.com
Mon Oct 21 17:38:04 PDT 2024


On Sat, Aug 31, 2024 at 08:49:22PM +0800, Inochi Amaoto wrote:
> On Thu, Aug 29, 2024 at 02:31:52PM GMT, Thomas Bonnefille wrote:
> > Add SARADC node for the Successive Approximation Analog to
> > Digital Converter used in Sophgo CV1800B SoC.
> > This patch only adds the active domain controller.
> > 
> > Signed-off-by: Thomas Bonnefille <thomas.bonnefille at bootlin.com>
> > ---
> >  arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 22 ++++++++++++++++++++++
> >  1 file changed, 22 insertions(+)
> > 
> > diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > index 891932ae470f..da1ac59e976f 100644
> > --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> > @@ -133,6 +133,28 @@ portd: gpio-controller at 0 {
> >  			};
> >  		};
> >  
> > +		saradc: adc at 30f0000 {
> > +			compatible = "sophgo,cv1800b-saradc";
> > +			reg = <0x030f0000 0x1000>;
> > +			clocks = <&clk CLK_SARADC>;
> > +			interrupts = <100 IRQ_TYPE_LEVEL_HIGH>;
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			status = "disabled";
> > +
> 
> > +			channel at 0 {
> > +				reg = <0>;
> > +			};
> > +
> > +			channel at 1 {
> > +				reg = <1>;
> > +			};
> > +
> > +			channel at 2 {
> > +				reg = <2>;
> > +			};
> 
> I think it may better to move channel definition to board file.
> 

It seems OK, let's drop my previous comment.

Reviewed-by: Inochi Amaoto <inochiama at gmail.com>

> > +		};
> > +
> >  		i2c0: i2c at 4000000 {
> >  			compatible = "snps,designware-i2c";
> >  			reg = <0x04000000 0x10000>;
> > 
> > -- 
> > 2.46.0
> > 



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