[PATCH v5 3/3] riscv: dts: starfive: add DeepComputing FML13V01 board device tree
Conor Dooley
conor at kernel.org
Mon Oct 21 04:16:42 PDT 2024
On Mon, Oct 21, 2024 at 09:17:59AM +0200, Krzysztof Kozlowski wrote:
> On Sun, Oct 20, 2024 at 09:49:59PM +0800, Guodong Xu wrote:
> > From: Sandie Cao <sandie.cao at deepcomputing.io>
> > +&camss {
> > + status = "disabled";
> > +};
> > +
> > +&csi2rx {
> > + status = "disabled";
> > +};
You can drop these two, I marked them disabled in the common file
earlier this week.
1
> > +
> > +&gmac0 {
> > + status = "disabled";
> > +};
> > +
> > +&i2c0 {
> > + status = "disabled";
> > +};
> > +
> > +&pwm {
> > + status = "disabled";
> > +};
> > +
> > +&pwmdac {
> > + status = "disabled";
> > +};
> > +
> > +&spi0 {
> > + status = "disabled";
>
> If your board has to disable all these, then they should not have been
> enabled in DTSI in the first place. Only blocks present and working in
> the SoC (without amny external needs) should be enabled.
>
> I suggest to fix that aspect first.
Eh, I don't think I agree. Having 5 disables here is a lesser evil than
reproducing 90% of jh7110-common.dtsi or shunting a bunch of stuff
around. Emil?
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 228 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-riscv/attachments/20241021/91e1e11a/attachment.sig>
More information about the linux-riscv
mailing list