[PATCH v5 0/3] riscv: spacemit: add pinctrl support to K1 SoC

[Linus Walleij]

On Wed, Oct 16, 2024 at 3:00 AM Yixun Lan <dlan at gentoo.org> wrote:

> This series adds pinctrl support to SpacemiT's K1 SoC, the controller
> uses a single register to describe all pin functions, including
> bias pull up/down, drive strength, schmitter trigger, slew rate,
> strong pull-up, mux mode. In patch #3, we add the pinctrl property of
> uart device for the Bananapi-F3 board.
>
> You can find the pinctrl docs of K1 here[1], and the original vendor's
> pinctrl dts data here[2].
>
> Note, we rewrite this series as an independent pinctrl driver for K1 SoC,
> which means it does not use pinctrl-single driver as the model anymore,
> see the suggestion from Krzysztof at [3].
>
> Link: https://developer.spacemit.com/documentation?token=An1vwTwKaigaXRkYfwmcznTXned [1]
> Link: https://gitee.com/bianbu-linux/linux-6.1/blob/bl-v1.0.y/arch/riscv/boot/dts/spacemit/k1-x_pinctrl.dtsi [2]
> Link: https://lore.kernel.org/all/b7a01cba-9f68-4a6f-9795-b9103ee81d8b@kernel.org/ [3]
> Signed-off-by: Yixun Lan <dlan at gentoo.org>

Patches 1 & 2 applied to the pin control tree for v6.13!

Please take patch 3 through the SoC tree.

Yours,
Linus Walleij