[PATCH v6 00/33] riscv control-flow integrity for usermode

[Mark Brown]

On Tue, Oct 08, 2024 at 03:36:42PM -0700, Deepak Gupta wrote:

> Equivalent to landing pad (zicfilp) on x86 is `ENDBRANCH` instruction in Intel
> CET [3] and branch target identification (BTI) [4] on arm.
> Similarly x86's Intel CET has shadow stack [5] and arm64 has guarded control
> stack (GCS) [6] which are very similar to risc-v's zicfiss shadow stack.

> x86 already supports shadow stack for user mode and arm64 support for GCS in
> usermode [7] is ongoing.

FWIW the arm64 support is now in -next, including these:

> Mark Brown (2):
>       mm: Introduce ARCH_HAS_USER_SHADOW_STACK
>       prctl: arch-agnostic prctl for shadow stack

shared changes to generic code.
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