[PATCH for-next] riscv: Fix default misaligned access trap

[Jesse T]

On Thu, Nov 7, 2024 at 5:38 PM Charlie Jenkins <charlie at rivosinc.com> wrote:
>
> Commit d1703dc7bc8e ("RISC-V: Detect unaligned vector accesses
> supported") removed the default handlers for handle_misaligned_load()
> and handle_misaligned_store(). When the kernel is compiled without
> RISCV_SCALAR_MISALIGNED
Technically CONFIG_RISCV_MISALIGNED.
I apparently changed `+obj-y += traps_misaligned.o` to
`+obj-$(CONFIG_RISCV_MISALIGNED) += traps_misaligned.o`
in V2 and didn't change that check back oops sorry.

> , these handlers are never defined, causing
> compilation errors.
>
> Signed-off-by: Charlie Jenkins <charlie at rivosinc.com>
Signed-off-by: Jesse Taube <mr.bossman075 at gmail.com>

> Fixes: d1703dc7bc8e ("RISC-V: Detect unaligned vector accesses supported")
> ---
>  arch/riscv/include/asm/entry-common.h | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>
> diff --git a/arch/riscv/include/asm/entry-common.h b/arch/riscv/include/asm/entry-common.h
> index 7b32d2b08bb6..c2808561df81 100644
> --- a/arch/riscv/include/asm/entry-common.h
> +++ b/arch/riscv/include/asm/entry-common.h
> @@ -25,7 +25,19 @@ static inline void arch_exit_to_user_mode_prepare(struct pt_regs *regs,
>  void handle_page_fault(struct pt_regs *regs);
>  void handle_break(struct pt_regs *regs);
>
> +#ifdef CONFIG_RISCV_SCALAR_MISALIGNED
>  int handle_misaligned_load(struct pt_regs *regs);
>  int handle_misaligned_store(struct pt_regs *regs);
> +#else
> +static inline int handle_misaligned_load(struct pt_regs *regs)
> +{
> +       return -1;
> +}
> +
> +static inline int handle_misaligned_store(struct pt_regs *regs)
> +{
> +       return -1;
> +}
> +#endif
>
>  #endif /* _ASM_RISCV_ENTRY_COMMON_H */
>
> ---
> base-commit: 74741a050b79d31d8d2eeee12c77736596d0a6b2
> change-id: 20241107-fix_handle_misaligned_load-8be86cb0806e
> --
> - Charlie
>