[PATCH 09/11] riscv: alternative: Allow calls with alternate link registers
Samuel Holland
samuel.holland at sifive.com
Fri Nov 1 17:08:03 PDT 2024
Alternative assembly code may wish to use an alternate link register to
minimize the number of clobbered registers. Apply the offset fix to all
jalr (not jr) instructions, i.e. where rd is not x0.
Signed-off-by: Samuel Holland <samuel.holland at sifive.com>
---
arch/riscv/kernel/alternative.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/kernel/alternative.c b/arch/riscv/kernel/alternative.c
index 0128b161bfda..54d79e6f4afa 100644
--- a/arch/riscv/kernel/alternative.c
+++ b/arch/riscv/kernel/alternative.c
@@ -121,8 +121,8 @@ void riscv_alternative_fix_offsets(void *alt_ptr, unsigned int len,
if (!riscv_insn_is_jalr(insn2))
continue;
- /* if instruction pair is a call, it will use the ra register */
- if (RV_EXTRACT_RD_REG(insn) != 1)
+ /* if instruction pair is a call, it will save a link register */
+ if (RV_EXTRACT_RD_REG(insn) == 0)
continue;
riscv_alternative_fix_auipc_jalr(alt_ptr + i * sizeof(u32),
--
2.45.1
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