[PATCH v4 0/2 RESEND] Add StarFive's StarLink Cache Controller

[Conor Dooley]

From: Conor Dooley <conor.dooley at microchip.com>

On Wed, 15 May 2024 13:02:51 +0800, Joshua Yeong wrote:
> StarFive's StarLink Cache Controller flush/invalidates cache using non-
> conventional RISC-V Zicbom extension instructions. This driver provides the
> cache handling on StarFive RISC-V SoC.
> 
> Changes in v4:
> - Move cache controller initialization to arch_initcall()
> - Link to v3: https://lore.kernel.org/all/20240424075856.145850-1-joshua.yeong@starfivetech.com/
> 
> [...]

I've picked these two up and applied to riscv-cache-for-next, with their
order corrected. Emil, shout if there was something left from your
feedback that was unimplemented. The wording etc seems to have been
"fixed" in this version.

[1/2] cache: Add StarFive StarLink cache management
      https://git.kernel.org/conor/c/cabff60ca77d
[2/2] dt-bindings: cache: Add docs for StarFive Starlink cache controller
      https://git.kernel.org/conor/c/c6005d4dd216

Thanks,
Conor.