[PATCH v3 0/2] RISC-V: clarify what some RISCV_ISA* config options do & redo Zbb toolchain dependency

[Conor Dooley]

From: Conor Dooley <conor.dooley at microchip.com>

Since one depends on the other, albeit trivially, here's a v2 of the Zbb
toolchain dep removal alongside the rewording of Kconfig options I'd
sent out before the merge window. I think I like this implementation
better than v1, but I couldn't think of a good name for a "public"
version of __ALTERNATIVE(), so I used it here directly.
Unfortunately "ALTERNATIVE_2_CFG" already exists and I couldn't think of
a good way to name an alternative macro that allows for several config
options that didn't make the distinction sufficiently clear.. Yell
if you have better suggestions than I did.

I am a wee bit "worried" that this makes the Kconfig option confusing as
it isn't immediately obvious if someone is or is not going to get the
toolchain based optimisations.

Cheers,
Conor.

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Conor Dooley (2):
  RISC-V: clarify what some RISCV_ISA* config options do
  RISC-V: separate Zbb optimisations requiring and not requiring
    toolchain support

 arch/riscv/Kconfig                    | 38 ++++++++++++++-------------
 arch/riscv/include/asm/arch_hweight.h |  6 ++---
 arch/riscv/include/asm/bitops.h       |  4 +--
 arch/riscv/include/asm/checksum.h     |  3 +--
 arch/riscv/lib/csum.c                 | 21 +++------------
 arch/riscv/lib/strcmp.S               |  5 ++--
 arch/riscv/lib/strlen.S               |  5 ++--
 arch/riscv/lib/strncmp.S              |  5 ++--
 8 files changed, 38 insertions(+), 49 deletions(-)

-- 
2.43.0