[PATCH 4/7] riscv: drop the use of XIP_OFFSET in XIP_FIXUP_FLASH_OFFSET

[Alexandre Ghiti]

On 10/05/2024 08:28, Nam Cao wrote:
> XIP_OFFSET is the hard-coded offset of writable data section within the
> kernel.
>
> By hard-coding this value, the read-only section of the kernel (which is
> placed before the writable data section) is restricted in size.
>
> As a preparation to remove this hard-coded macro XIP_OFFSET entirely, stop
> using XIP_OFFSET in XIP_FIXUP_FLASH_OFFSET. Instead, use __data_loc and
> _sdata to do the same thing.
>
> While at it, also add a description for XIP_FIXUP_FLASH_OFFSET.
>
> Signed-off-by: Nam Cao <namcao at linutronix.de>
> ---
>   arch/riscv/include/asm/xip_fixup.h | 16 ++++++++++++----
>   1 file changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/arch/riscv/include/asm/xip_fixup.h b/arch/riscv/include/asm/xip_fixup.h
> index 9ed2cfae09e0..f3d56299bc22 100644
> --- a/arch/riscv/include/asm/xip_fixup.h
> +++ b/arch/riscv/include/asm/xip_fixup.h
> @@ -24,13 +24,21 @@
>   	sub \reg, \reg, t0
>   .endm
>   .macro XIP_FIXUP_FLASH_OFFSET reg
> +	/* In linker script, at the transition from read-only section to
> +	 * writable section, the VMA is increased while LMA remains the same.
> +	 * (See in linker script how _sdata, __data_loc and LOAD_OFFSET is
> +	 * changed)
> +	 *
> +	 * Consequently, early during boot before MMU is up, the generated code
> +	 * reads the "writable" section at wrong addresses, because VMA is used
> +	 * by compiler to generate code, but the data is located in Flash using
> +	 * LMA.
> +	 */
> +	la t0, _sdata
> +	sub \reg, \reg, t0
>   	la t0, __data_loc
> -	REG_L t1, _xip_phys_offset
> -	sub \reg, \reg, t1
>   	add \reg, \reg, t0
>   .endm
> -
> -_xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET
>   #else
>   .macro XIP_FIXUP_OFFSET reg
>   .endm


Reviewed-by: Alexandre Ghiti <alexghiti at rivosinc.com>

Thanks,

Alex