[PATCH 0/2] riscv: Allow vlenb to be probed from DT

[Jessica Clarke]

On 15 May 2024, at 22:50, Charlie Jenkins <charlie at rivosinc.com> wrote:
> 
> The kernel currently requires all harts to have the same value in the
> vlenb csr that is present when a hart supports vector. In order to read
> this csr, the kernel needs to boot the hart. Adding vlenb to the DT will
> allow the kernel to detect the inconsistency early and not waste time
> trying to boot harts that it doesn't support.

That doesn’t seem sufficient justification to me. If it can be read
from the hardware, why should we have to put it in the FDT? The whole
point of the FDT is to communicate the hardware configuration that
isn’t otherwise discoverable.

As for T-HEAD stuff, if they need it they can have a custom property.
Though naively I’d assume there’s a way to avoid it still...

Jess